Inventors:
Qiang Cao - Burlingame CA, US
Sushil Kumar - Mountain View CA, US
Tirthankar Lahiri - Santa Clara CA, US
Yunrui Li - Fremont CA, US
Gianfranco Putzolu - San Francisco CA, US
Assignee:
Oracle International Corporation (OIC) - Redwood Shores CA
International Classification:
G06F 9/45
US Classification:
703 22, 714 6, 714 15, 713200, 707202, 707206, 707102
Abstract:
A method for simulating different MTTR settings includes determining a simulated MTTR setting and providing a simulated checkpoint queue. The simulated checkpoint queue is associated with the simulated MTTR setting and is an ordered list of one or more elements. Each element represents a buffer, and the ordered list has a head and a tail. The method also includes providing a simulated write counter associated with the simulated MTTR setting. The method further includes, in response to detecting a change to a first buffer, checking if the first buffer is represented in the simulated checkpoint queue. If the first buffer is not represented in the simulated checkpoint queue, an element that represents the first buffer is linked to the tail of the simulated checkpoint queue. An MTTR advisory system includes a memory, one or more processors coupled to the memory, a simulated MTTR setting, a simulated checkpoint queue, and a simulated write counter. The simulated MTTR setting is maintained in the memory.
