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Rajiv A Gupta, 6444 Claret, Irvine, CA 92614

Known as:
Ravi Gupta Rajiv Gubta John J Duffy Gupta Rajiv Jack Duffy
Related to:
Surendra K Gupta 76

Rajiv Gupta Phones & Addresses

1119 Quail Cyn, Irvine, CA 92603    949-3368674   

9985 Laurelwood Dr, Oro Valley, AZ 85737    520-5751843   

Tucson, AZ   

Pittsburgh, PA   

Cockeysville, MD   

Ossining, NY   

Pima, AZ   

Sunnyvale, CA   

Bonita Springs, FL   

1133 Quail Meadows, Irvine, CA 92603    520-5751843   

Work

Position: Building and Grounds Cleaning and Maintenance Occupations

Education

Degree: Graduate or professional degree
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Mentions for Rajiv A Gupta

Career records & work history

Medicine Doctors

Rajiv R. Gupta

Specialties:
Pediatrics, Adolescent Medicine
Work:
Zanesville Pediatrics Inc
1066 Beverly Ave, South Zanesville, OH 43701
740-4509200 (phone) 855-8827967 (fax)
Education:
Medical School
Inst of Med Sci, Banaras Hindu Univ, Varanasi, Up, India
Graduated: 1986
Procedures:
Circumcision, Destruction of Benign/Premalignant Skin Lesions, Hearing Evaluation, Lumbar Puncture, Nutrition Therapy, Psychological and Neuropsychological Tests, Pulmonary Function Tests, Vaccine Administration
Conditions:
Acute Upper Respiratory Tract Infections, Croup, Abdominal Hernia, Acute Bronchitis, Acute Conjunctivitis, Acute Pharyngitis, Acute Sinusitis, Allergic Rhinitis, Anemia, Anxiety Dissociative and Somatoform Disorders, Anxiety Phobic Disorders, Appendicitis, Atopic Dermatitis, Attention Deficit Disorder (ADD), Autism, Bacterial Food Poisoning, Bacterial Pneumonia, Bell's Palsy, Bronchial Asthma, Bulimia Nervosa, Burns, Chronic Sinusitis, Constipation, Cystic Fibrosis (CF, Dehydration, Deviated Nasal Septum, Epilepsy, Gingival and Periodontal Diseases, Hearing Loss, Infectious Mononucleosis, Inguinal Hernia, Iron Deficiency Anemia, Obsessive-Compulsive Disorder (OCD), Orbital Infection, Otitis Media, Peripheral Nerve Disorders, Pertussis, Plantar Warts, Pneumonia, Poisoning by Drugs, Meds, or Biological Substances, Skin and Subcutaneous Infections, Tempromandibular Joint Disorders (TMJ), Tension Headache, Undescended and Retractile Testicle, Urinary Incontinence, Viral Pneumonia
Languages:
English
Description:
Dr. Gupta graduated from the Inst of Med Sci, Banaras Hindu Univ, Varanasi, Up, India in 1986. He works in Zanesville, OH and specializes in Pediatrics and Adolescent Medicine. Dr. Gupta is affiliated with Genesis Hospital and Nationwide Childrens Hospital.

Rajiv Gupta

Specialties:
Cardiovascular Disease
Work:
Central Texas Veterans Affairs Healthcare Cardiology
1901 S 1 St, Temple, TX 76504
254-7784811 (phone) 254-7430138 (fax)
Education:
Medical School
Calcutta Nat'l Med Coll, Univ of Calcutta, Calcutta, West Bengal
Graduated: 1993
Procedures:
Angioplasty, Cardiac Catheterization, Cardiac Stress Test, Continuous EKG, Echocardiogram, Electrocardiogram (EKG or ECG)
Conditions:
Atrial Fibrillation and Atrial Flutter, Cardiac Arrhythmia, Heart Failure, Acute Myocardial Infarction (AMI), Angina Pectoris, Aortic Valvular Disease, Cardiomyopathy, Conduction Disorders, Ischemic Heart Disease
Languages:
English
Description:
Dr. Gupta graduated from the Calcutta Nat'l Med Coll, Univ of Calcutta, Calcutta, West Bengal in 1993. He works in Temple, TX and specializes in Cardiovascular Disease.

License Records

Rajiv Gupta

Licenses:
License #: 24578 - Active
Issued Date: Apr 26, 2006
Renew Date: Dec 1, 2015
Expiration Date: Nov 30, 2017
Type: Certified Public Accountant

Rajiv Gupta resumes & CV records

Resumes

Rajiv Gupta Photo 40

Director, Ip & Design Services At Jazz Semi

Position:
Director, IP & Design Services at Jazz Semi
Location:
Orange County, California Area
Industry:
Semiconductors
Work:
Jazz Semi
Director, IP & Design Services
Rajiv Gupta Photo 41

Managing Consultant At Lunexa

Position:
Data Warehouse Consultant at Kelley Blue Book, Managing Consultant at Lunexa
Location:
Orange County, California Area
Industry:
Information Technology and Services
Work:
Kelley Blue Book - Irvine, ca since Mar 2012
Data Warehouse Consultant Lunexa since Jun 2007
Managing Consultant Mercury Insurance Jul 2008 - Apr 2012
Data Warehouse Architect First American Corporation 2007 - 2008
Datawarehouse Consultant New Century Mortgage Nov 2006 - May 2007
ETL Developer III New Century Nov 2006 - May 2007
ETL Developer III Informatica Corporation Jun 2002 - Nov 2006
Senior Consultant Informatica Jun 2002 - Nov 2006
Senior Consultant Lockheed Martin 2003 - 2005
ETL Lead
Education:
University of California, Berkeley 1998 - 2002
BS, Business, Computer Science
Rajiv Gupta Photo 42

Rajiv Gupta

Location:
United States
Rajiv Gupta Photo 43

Rajiv Gupta

Location:
United States
Rajiv Gupta Photo 44

Rajiv Gupta

Location:
United States
Rajiv Gupta Photo 45

It Engineer

Location:
Frederick, Maryland
Industry:
Computer Software
Education:
L D Engg College
Bachelor of Engineering
Rajiv Gupta Photo 46

Rajiv Gupta

Location:
United States
Rajiv Gupta Photo 47

Rajiv Gupta

Location:
United States

Publications & IP owners

Us Patents

Four Port Ram Cell

US Patent:
6741517, May 25, 2004
Filed:
Mar 29, 2002
Appl. No.:
10/113684
Inventors:
Duncan M. Fisher - Mission Viejo CA
Rajiv Gupta - Fullerton CA
Assignee:
Mindspeed Technologies, Inc. - Newport Beach CA
International Classification:
G11C 800
US Classification:
36523005, 365154, 365156, 365203
Abstract:
According to one embodiment, a RAM array includes at least one RAM cell comprising a first access transistor driven by a first word line. When the first access transistor is turned on, it couples the RAM cell to a first bit line. The first bit line is connected to a single-ended sense amplifier such as an inverter. Similarly, the RAM cell comprises second, third, and fourth access transistors driven by respectively second, third, and fourth word lines. When the respective access transistors are turned on, they couple the RAM cell to respectively second, third, and fourth bit lines. The bit lines are connected to respective single-ended sense amplifiers such as inverters. In one embodiment, each of the first, second, third, and fourth access transistors is an NFET. The first, second, third, and fourth bit lines are coupled to respectively first, second, third, and fourth precharge transistors.

Hierarchical Software Path Profiling

US Patent:
6848100, Jan 25, 2005
Filed:
Mar 31, 2000
Appl. No.:
09/541399
Inventors:
Youfeng Wu - Palo Alto CA, US
Ali Adl-Tabatabai - Santa Clara CA, US
David A. Berson - Marietta GA, US
Jesse Fang - San Jose CA, US
Rajiv Gupta - Tucson AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 945
US Classification:
717157, 717133
Abstract:
A hierarchical software profiling mechanism that gathers hierarchical path profile information has been described. Software to be profiled is instrumented with instructions that save an outer path sum when an inner region is entered, and restore the outer path sum when the inner region is exited. When the inner region is being executed, an inner path sum is generated and a profile indicator representing the inner path traversed is updated prior to the outer path sum being restored. The software to be profiled is instrumented using information from augmented control flow graphs that represent the software.

Method And System For Execution And Latching Of Data In Alternate Threads

US Patent:
7428653, Sep 23, 2008
Filed:
Jul 20, 2005
Appl. No.:
11/185926
Inventors:
Duncan M. Fisher - Mission Viejo CA, US
Keith Bindloss - Irvine CA, US
Ching Long Su - Arcadia CA, US
Marty T. Budrovic - Las Flores CA, US
Rajiv Gupta - Fullerton CA, US
Assignee:
Mindspeed Technologies, Inc. - Newport Beach CA
International Classification:
G06F 1/12
G06F 1/04
US Classification:
713400, 713600
Abstract:
An alternate multi-thread pipeline structure and method are provided. A deep pipeline is provided in which two threads of two separate pipeline stages are alternatively presented to the various logic and latch circuits for execution. The execution and latching of the threads alternates from one thread to the other within a single clock cycle. Thus, each thread is executed once per clock cycle and two threads are executed in a single clock cycle.

Software Flow Tracking Using Multiple Threads

US Patent:
8321840, Nov 27, 2012
Filed:
Dec 27, 2007
Appl. No.:
11/965271
Inventors:
Vijayanand Nagarajan - Riverside CA, US
Ho-Seop Kim - Austin TX, US
Youfeng Wu - Palo Alto CA, US
Rajiv Gupta - Tucson AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 9/44
US Classification:
717126, 717106, 717130
Abstract:
Methods, systems and machine readable media are disclosed for performing dynamic information flow tracking. One method includes executing operations of a program with a main thread, and tracking the main thread's execution of the operations of the program with a tracking thread. The method further includes updating, with the tracking thread, a taint value associated with the value of the main thread to reflect whether the value is tainted, and determining, with the tracking thread based upon the taint value, whether use of the value by the main thread violates a specific security policy.

Oscillator Signal Detect Circuit

US Patent:
4583013, Apr 15, 1986
Filed:
Feb 13, 1984
Appl. No.:
6/579617
Inventors:
Rajiv Gupta - Brea CA
Assignee:
Rockwell International Corporation - El Segundo CA
International Classification:
H03K 17687
US Classification:
307480
Abstract:
A circuit for use on an integrated circuit chip for detecting the operative connection of a crystal used to control an on-chip crystal controlled oscillator, which generates a cyclical clock signal, by detecting the presence or absence, respectively, of the cyclical clock signal and for providing an output control signal in response thereto to an on-chip terminal pad control circuit which automatically enables an on-chip terminal pad to be utilized as a clock signal output terminal pad if the cyclical clock signal presence is detected or as a clock signal input terminal pad otherwise. Also, a method of automatically switching the function of a terminal pad on an integrated circuit chip to function as a clock signal output terminal pad or as a clock signal input terminal pad in accordance with detecting the existence or non-existence of a cyclical clock signal generated on-chip.

Symmetrical Clock Crystal Oscillator Circuit

US Patent:
5455542, Oct 3, 1995
Filed:
Nov 22, 1993
Appl. No.:
8/155500
Inventors:
John R. Spence - Villa Park CA
Rajiv Gupta - Brea CA
Ming M. Zhang - Irvine CA
Assignee:
Rockwell International Corporation - Seal Beach CA
International Classification:
H03B 530
US Classification:
331158
Abstract:
An oscillator circuit provides a symmetrical signal without halving the frequency of a crystal oscillator 12. The input 14 of the crystal oscillator 12 is low pass filtered, and the output 18 of the filter 16 is differential voltage compared with the input 14 of the crystal oscillator 12. The output 22 of the differential voltage comparator 20 is symmetrical and of the same frequency as the crystal oscillator 12. The crystal oscillator 12 is preferably a Pierce oscillator.

Supply-Discriminating Supply-Adaptive Electronic System

US Patent:
5514951, May 7, 1996
Filed:
Apr 11, 1994
Appl. No.:
8/226198
Inventors:
Raouf Halim - Laguna Niguel CA
Rajiv Gupta - Brea CA
Daryush Shamlou - Laguna Niguel CA
Assignee:
Rockwell International Corporation - Seal Beach CA
International Classification:
G05F 140
US Classification:
323901
Abstract:
A novel supply discriminator circuit is disclosed for detecting the level of a supply voltage during power-up of a system for configuring an integrated analog circuit such as a PCMCIA card. The circuit compares a reference voltage with a divided down supply voltage and latches the result a predetermined delay later. The delay thus provides timing for the supply voltage to stabilize after power-up to assure accurate detection, as well as noise immunity from other devices.

Optimizing Code Based On Resource Sensitive Hoisting And Sinking

US Patent:
6044221, Mar 28, 2000
Filed:
May 9, 1997
Appl. No.:
8/853287
Inventors:
Rajiv Gupta - Pittsburgh PA
David A. Berson - Fremont CA
Jesse Z. Fang - San Jose CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 945
US Classification:
395709
Abstract:
A method and apparatus for optimizing code using resource based partial elimination techniques is disclosed. At least one location is identified in the code wherein the at least one location has available resources. One of the plurality of instructions is moved to the at least one location according to partial elimination techniques.

Isbn (Books And Publications)

Advancements In Insect Biodiversity

Author:
Rajiv K. Gupta
ISBN #:
8177542087

Object-Oriented Databases With Applications To Case, Networks, And Vlsi Cad

Author:
Rajiv Gupta
ISBN #:
0136298338

Number Theory: Fifth Conference Of The Canadian Number Theory Association August 17-22, 1996 Carleton University, Ottawa, Ontario, Canada

Author:
Rajiv Gupta
ISBN #:
0821809644

Class, Ideology, And World Order

Author:
Rajiv Gupta
ISBN #:
8171930409

Possible Relatives

David Gupta  Dalip K Gupta  Aakash Gupta  Deborah F Gupta  Deep S Gupta  Deepa Gupta  Deepti Gupta  Rajiv Singh  Rajiv Prasad  Rajiv P Das 

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