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Ralph C Castro, 48211 N 8Th St UNIT 347, Las Vegas, NV 89101

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Us Patents

Tag Memory Disk Cache Architecture

US Patent:
6862660, Mar 1, 2005
Filed:
Apr 21, 2003
Appl. No.:
10/419459
Inventors:
Virgil V. Wilkins - Perris CA, US
Ralph H. Castro - Lake Forest CA, US
Tsun Y. Ng - Orange CA, US
Assignee:
Western Digital Technologies, Inc. - Lake Forest CA
International Classification:
G08F012/00
US Classification:
711113, 711114, 711118, 711202
Abstract:
The present invention is embodied in the disk drive having a cache control system that is configured to efficiently respond to host commands by forming variable length segments of memory clusters for caching disk data in contiguous ranges of logical block addresses without regard to the sequential order of the memory clusters. The cache control system has a tag memory usable only for defining the segments. The tag memory has a plurality of tag records pointing to cluster control blocks associated with the memory clusters for defining the segments. The tag memory may be accessed and updated by several state machines in the cache control system and by a microprocessor in the disk drive.

Tag Memory Disk Cache Architecture

US Patent:
6553457, Apr 22, 2003
Filed:
Apr 19, 2000
Appl. No.:
09/552404
Inventors:
Virgil V. Wilkins - Perris CA
Ralph H. Castro - Lake Forest CA
Tsun Y. Ng - Irvine CA
Assignee:
Western Digital Technologies, Inc. - Lake Forest CA
International Classification:
G06F 1200
US Classification:
711113, 711114, 711118, 711202
Abstract:
The present invention is embodied in the disk drive having a cache control system that is configured to efficiently respond to host commands by forming variable length segments of memory clusters for caching disk data in contiguous ranges of logical block addresses without regard to the sequential order of the memory clusters. The cache control system has a tag memory usable only for defining the segments. The tag memory has a plurality of tag records pointing to cluster control blocks associated with the memory clusters for defining the segments. The tag memory may be accessed and updated by several state machines in the cache control system and by a microprocessor in the disk drive.

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