Ranbir SinghNewburgh, NY

7019344, Mar 28, 2006

Jun 3, 2004

10/859565

Ranbir Singh - Gaithersburg MD, US

H01L 29/94

257263, 257329

A lateral drift vertical metal-insulated field effect transistor (LDVMISFET) with an optimum conducting channel formed in Silicon Carbide, is provided as a power transistor with a voltage rating of greater than 200 V. The lateral drift region achieves a better on-resistance/breakdown voltage trade-off than the conventional vertical drift region design of power MOSFETs. This is achieved by using an optimal doping and thickness for the voltage blocking and current conduction. The drain and backside terminal is able to support at least the rated blocking voltage of the device. A vertical MIS channel may be formed on the favorable 11-20 plane to achieve a higher MIS channel mobility as compared to the conventional 0001 or 000-1 planes resulting in a much lower on-resistance for the same blocking voltage as compared to conventional vertical MOSFET with similar blocking voltage.

7026669, Apr 11, 2006

Jun 3, 2004

10/859576

Ranbir Singh - Gaithersburg MD, US

H01L 29/80

257279, 257 76, 257 77, 257287, 257492, 257493, 257615, 257622

A lateral channel transistor with an optimal conducting channel formed in widebandgap semiconductors like Silicon Carbide and Diamond is provided. Contrary to conventional vertical design of power transistors, a higher, optimum doping for a given thickness supports higher source/drain blocking voltage. A backside gate is insulated from the channel region using a low doped layer of the opposite conductivity type than the channel region to support the rated blocking voltage of the device.

7105875, Sep 12, 2006

Jun 3, 2004

10/859567

Ranbir Singh - Gaithersburg MD, US

Wide bandgap, LLC - South Riding VA

H01L 27/148

257220, 257 76, 257 77, 257 78, 257 48, 257284, 438105, 438931

A lateral power diodes with an optimal drift doping formed in widebandgap semiconductors like Silicon Carbide, Aluminum Nitride and Gallium Nitride and Diamond are provided with a voltage rating greater 200V. Contrary to conventional vertical design of power diodes, a higher, optimum doping for a given thickness is critical in supporting higher anode/cathode blocking voltage, and lower on-resistance than vertical drift region designs. The backside contact and the anode junction must be able to support the rated blocking voltage of the device.

7449762, Nov 11, 2008

Apr 7, 2006

11/399452

Ranbir Singh - South Riding VA, US

Wide Bandgap LLC - South Riding VA

H01L 23/58

257493, 257279, 257287

A Lateral Epitaxial Gallium Nitride metal insulator semiconductor field effect transistor (LEGaN-MISFET) is described that includes a body region including at least one layer formed of Gallium Nitride having a first conductivity type formed on the substrate; a resurf layer of Gallium Nitride having a second conductivity type formed the body region; a source region in contact with the resurf layer; a drain region, in contact with the resurf layer and spaced apart from the source region; a gate metal insulator semiconductor (MIS) structure in contact with the body region including a gate contact; and a MIS conductive inversion channel along the surface of the body region in contact with the gate MIS structure. A lateral current conduction path may be formed in the resurf layer between the source region and the drain region connected by the MIS channel, where the lateral current conduction path is controlled by an applied gate source bias.

7843030, Nov 30, 2010

Mar 22, 2007

11/689524

Ranbir Singh - South Riding VA, US

H01L 31/101

257462, 257E2918, 257E31063

Here, we demonstrate new material/structures for the photodetectors, using semiconductor material. For example, we present the Tunable Avalanche Wide Base Transistor as a photodetector. Particularly, SiC, GaN, AlN, Si and Diamond materials are given as examples. The desired properties of an optimum photodetector is achieved. Different variations are discussed, both in terms of structure and material.

7982239, Jul 19, 2011

Jun 13, 2007

11/808915

Ty R. McNutt - Columbia MD, US
Eric J. Stewart - Silver Spring MD, US
Rowland C. Clarke - Sykesville MD, US
Ranbir Singh - South Riding VA, US
Stephen Van Campen - Clarksville MD, US
Marc E. Sherwin - Catonsville MD, US

Northrop Grumman Corporation - Los Angeles CA

H01L 29/47

257133, 257109, 257471, 257475, 257E21351

In an embodiment, a integrated semiconductor device includes a first Vertical Junction Field Effect Transistor (VJFET) having a source, and a gate disposed on each side of the first VJFET source, and a second VJFET transistor having a source, and a gate disposed on each side of the second VJFET source. At least one gate of the first VJFET is separated from at least one gate of the second VJFET by a channel. The integrated semiconductor device also includes a Junction Barrier Schottky (JBS) diode positioned between the first and second VJFETs. The JBS diode comprises a metal contact that forms a rectifying contact to the channel and a non-rectifying contact to at least one gate of the first and second VJFETs, and the metal contact is an anode of the JBS diode. A first electrical connection ties the gates of the first VJFET, the gates of the second VJFET, and the anode of the JBS diode to a common gate electrode and a second electrical connection ties the source of the first VJFET and the source of the second VJFET to a common source electrode.

2022038, Dec 1, 2022

Feb 22, 2022

17/677068

- Dulles VA, US
Ranbir Singh - Dulles VA, US
Jaehoon Park - Dulles VA, US

H01L 29/06
H01L 29/10
H01L 29/16
H01L 21/04
H01L 29/78
H01L 29/66

An embodiment relates to a method and manufacture of robust, high-performance devices. The method comprises preparing a unit cell of a Silicon Carbide (SiC) substrate comprising a first conductivity type substrate and a first conductivity type drift layer; forming a second conductivity type well region; forming a first conductivity type source region within the second conductivity type well region; and forming a second conductivity type shield region surrounding the first conductivity type source region. The second conductivity type shield region formed comprises a portion of the second conductivity type shield region located on a SiC surface.

2022036, Nov 17, 2022

Mar 4, 2022

17/686455

- Dulles VA, US
Ranbir Singh - Dulles VA, US
Jaehoon Park - Dulles VA, US

H01L 29/16
H01L 29/66
H01L 29/78
H01L 29/08
H01L 29/10
H01L 29/06

A device is described herein. The device comprises a unit cell of a silicon carbide (SiC) substrate. The unit cell comprises: a trench in a well region having a second conduction type. The well region is in contact with a region having a first conduction type to form a p-n junction. A width of the trench is less than 1.0 micrometers (μm). A width of the unit cell is one of less than and equal to 5.0 micrometers (μ.m). The device comprises a source region comprising the first conduction type. The device further comprises a metal oxide semiconductor field effect transistor component. The device described herein comprises a reduced unit cell pitch and reduced channel resistance without any compromise in channel length. The device comprises an ILD opening greater than or equal to width of the trench.