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Reed Michelle Adams, 651477 Rancho Rose Way UNIT 43, Oceanside, CA 92057

Reed Adams Phones & Addresses

Oceanside, CA   

Castro Valley, CA   

Lehi, UT   

Salt Lake City, UT   

163 1165, Lindon, UT 84042    801-7960135    801-7960136   

Orem, UT   

Bismarck, MO   

Work

Address: 7 Crestwood Rd, Kaysville, UT 84037 Specialities: Dentist

Languages

English

Mentions for Reed Michelle Adams

Career records & work history

Lawyers & Attorneys

Reed Adams Photo 1

Reed Adams, Provo UT - Lawyer

Address:
4844 N 300 W, Provo, UT 84604
Phone:
801-3756600 (Phone), 801-3753865 (Fax)
Specialties:
Medical Malpractice, Personal Injury, Products Liability, Car Accidents
Jurisdiction:
Utah
Education:
Brigham Young University
Memberships:
Utah State Bar

Medicine Doctors

Reed Adams Photo 2

Dr. Reed L Adams, Kaysville UT - DDS (Doctor of Dental Surgery)

Specialties:
Dentistry
Address:
7 Crestwood Rd, Kaysville, UT 84037
801-5443953 (Phone) 801-5445381 (Fax)
Languages:
English
Reed Adams Photo 3

Reed Larson Adams, Kaysville UT

Specialties:
Dentist
Address:
7 Crestwood Rd, Kaysville, UT 84037

Reed Adams resumes & CV records

Resumes

Reed Adams Photo 37

Reed Adams

Reed Adams Photo 38

Reed Adams

Reed Adams Photo 39

Director - New Product Development At Volterra

Position:
Director - New Product Development at Volterra
Location:
San Francisco Bay Area
Industry:
Semiconductors
Work:
Volterra - Fremont, CA since Jan 2012
Director - New Product Development
Analog Devices Feb 2009 - Dec 2011
Fixed Power Design Manager
Analog Devices Jun 2006 - Dec 2008
Development Center Manager
Texas Instruments Nov 1995 - May 2006
Analog / Mixed-Signal Design Engineer
Texas Instruments Jun 1994 - Oct 1995
Process and Equipment Engineer
Education:
Duke University - The Fuqua School of Business 2007 - 2008
EMBA, Executive MBA Program
Southern Methodist University 1994 - 1997
MS, Electrical Engineering
Texas A&M University 1990 - 1994
BS, Electrical Engineering
Honor & Awards:
PATENT AWARDS • Current Mirror Circuit that Allows for Over-Voltage Stress Testing, US #7,439,796; October, 2008. • Current Limiting Circuit for High-Speed Low-Side Driver Outputs, US #7,071,740; July, 2006. • Clamping Circuit for High-Speed Low-Side Driver Outputs, US #6,956,425; October, 2005. • System for Oxide Stress Testing, US #6,864,702; March, 2005. • Single-Poly EEprom on a negatively biased substrate, US #6,815,757; November, 2004. • Internal Protection Circuit and Method for On-Chip Programmable Poly Fuses, US #6,469,884; October, 2002. • Variable Transconductance Current Mirror Circuit, US #6,255,887; July, 2001. OTHER AWARDS Nominated Senior Member Technical Staff at TI in 2005. Elected Member of Group Technical Staff at TI in 2000.

Publications & IP owners

Us Patents

Esd Protection Circuit For A Switching Power Converter

US Patent:
8345394, Jan 1, 2013
Filed:
Oct 5, 2009
Appl. No.:
12/573501
Inventors:
James W. Zhao - San Francisco CA, US
Reed W. Adams - Mountain View CA, US
Kenji Tomiyoshi - Mihama-Ku Chiba, JP
Bin Shao - Shanghai, CN
Atsushi Matamura - Tokyo, JP
Yogesh Sharma - Santa Clara CA, US
Todd Thomas - San Jose CA, US
Assignee:
Analog Devices, Inc. - Norwood MA
International Classification:
H02H 9/00
US Classification:
361 56
Abstract:
An ESD protection circuit for a switching power converter which includes a high-side switching element connected between a supply voltage and the switching node, and a low-side switching element connected between the switching node and a common node. A current conduction path couples an ESD event that occurs on the switching node to an ESD sense node, and an ESD sensing circuit coupled to the sense node generates a trigger signal when an ESD event is sensed. A first logic gate keeps the high-side switching element off when the trigger signal indicates the sensing of an ESD event, and a second logic gate causes the low-side switching element to turn on when an ESD event is sensed such that the low-side switching element provides a conductive discharge path between the switching node and common node.

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