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Renato J Recio, 646707 Winnipeg Cv, Austin, TX 78759

Renato Recio Phones & Addresses

6707 Winnipeg Cv, Austin, TX 78759    512-2318106   

Chicago, IL   

Rochester, MN   

6707 Winnipeg Cv, Austin, TX 78759    512-7992350   

Work

Company: Instaedu Jan 2015 Position: Computer science academic tutor

Education

School / High School: University of Texas at Austin (Major GPA 3.4)- Austin, TX 2010 Specialities: Bachelor of Science and Arts in Computer Science

Skills

Java • Android • REST • Amazon Web Services • Hadoop • C • C++ • Maven • Perforce • Google API • Eclipse • Spring • SQL • JavaScript • HTML • CSS • Java Swing/SWT • Mockito • jUnit • Git

Mentions for Renato J Recio

Renato Recio resumes & CV records

Resumes

Renato Recio Photo 12

Ibm Fellow And Cloud Networking Chief Technology Officer At Ibm

Location:
15 Polk Ct, North Potomac, MD 20878
Industry:
Computer Networking
Work:
Openstack 2012 - 2015
Architect Working on
Ibm 2012 - 2015
Ibm Fellow and Cloud Networking Chief Technology Officer at Ibm
Ibm 2012 - 2015
Ibm Fellow and System Networking Chief Technology Officer
Education:
Saint Joseph's Catholic School
University of Illinois at Chicago
Bachelors, Bachelor of Science In Electrical Engineering
University of Minnesota
Master of Business Administration, Masters
Skills:
Cloud Computing, Virtualization, System Architecture, Data Center, Storage, Solution Architecture, Linux, Unix, Enterprise Architecture, Enterprise Software, Software Development, Distributed Systems, Integration, Servers, Networking, Software Engineering, Saas, It Strategy, Program Management, Product Management, Tcp/Ip, Testing
Languages:
Spanish
Renato Recio Photo 13

Renato L Recio

Location:
1012 Forest Trl, Cedar Park, TX 78613
Industry:
Computer Software
Languages:
Spanish
Certifications:
Certified Openstack Admininstrator
Renato Recio Photo 14

Renato Recio

Location:
Austin, TX
Industry:
Consumer Goods
Renato Recio Photo 15

Renato Recio

Renato Recio Photo 16

Renato Recio - Austin, TX

Work:
InstaEdu Jan 2015 to 2000
Computer Science Academic Tutor
Informatica Corporation - Redwood City, CA May 2014 to Aug 2014
Software Development Intern
Education:
University of Texas at Austin (Major GPA 3.4) - Austin, TX 2010 to 2015
Bachelor of Science and Arts in Computer Science
Skills:
Java, Android, REST, Amazon Web Services, Hadoop, C, C++, Maven, Perforce, Google API, Eclipse, Spring, SQL, JavaScript, HTML, CSS, Java Swing/SWT, Mockito, jUnit, Git

Publications & IP owners

Us Patents

Extending Adapter Memory With Solid State Disks In Jbod And Raid Environments

US Patent:
6467022, Oct 15, 2002
Filed:
Nov 3, 2000
Appl. No.:
09/706111
Inventors:
Pat Allen Buckland - Austin TX
Ian David Judd - Winchester, GB
Gary Robert Lyons - Leander TX
Renato John Recio - Austin TX
Michael Francis Scully - Austin TX
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1208
US Classification:
711113, 711 2
Abstract:
A Solid State Disk (âSSDâ) and accompanying logic to extend the local memory of an adapter for RAID storage devices. Use of virtual memory, representing the SSD range of addresses in the adapter address memory, allows the adapter to incorporate the total memory into the adapter memory structure. The SSD is non-volatile and large amounts of cache items may be transferred to the SSD as an extension of the adapter memory. The cache write may be delayed and subsequently written to a designated address on a RAID drive, freeing the adapter on-board memory and control functions. Further, the size of the SSD allows for large amounts of data staging and storage, permitting device-to-device communications that would reduce the read and write commands between the host, adapter and drives.

Using An Access Key To Protect And Point To Regions In Windows For Infiniband

US Patent:
6578122, Jun 10, 2003
Filed:
Mar 1, 2001
Appl. No.:
09/798183
Inventors:
Bruce Leroy Beukema - Hayfield MN
David F. Craddock - New Paltz NY
Ronald Edward Fuhs - Rochester MN
Thomas Anthony Gregg - Highland NY
Renato John Recio - Austin TX
Steven L. Rogers - Rochester MN
Bruce Marshall Walk - Rochester MN
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1200
US Classification:
711163, 711152, 711203, 711206, 710100, 709216
Abstract:
A method, system and program for controlling access to computer memory are provided. The present invention comprises receiving a work request from a user, wherein the work request comprises an index portion and a protection portion. The index portion of the work request is used to locate an element in an address translation and protection table. The protection portion of the work request is then compared with a protection key in the table element, and access to memory is granted only if the protection portion and protection key match.

Infiniband Memory Windows Management Directly In Hardware

US Patent:
6601148, Jul 29, 2003
Filed:
Mar 1, 2001
Appl. No.:
09/798295
Inventors:
Bruce Leroy Beukema - Hayfield MN
David F. Craddock - New Paltz NY
Ronald Edward Fuhs - Rochester MN
Thomas Anthony Gregg - Highland NY
Renato John Recio - Austin TX
Steven L. Rogers - Rochester MN
Bruce Marshall Walk - Rochester MN
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1206
US Classification:
711153, 711173, 711147
Abstract:
A method, system and program for controlling access to memory areas within a computer are provided. The invention comprises placing a first Bind Work Queue Element (WQE) at the head of a work queue, wherein the first Bind WQE defines parameters associated with a first Memory Window. A set of Work Requests is then placed on the work queue, behind the first Bind WQE wherein the work requests invoke operations that access the first Memory Window. A second Bind WQE is then placed on the work queue, behind the first set of Work Requests. This second Bind WQE defines parameters associated with a second Memory Window. A second set of Work Requests is placed on the work queue behind the second Bind WQE and invoke operations that access the second memory window. The Memory Windows can be associated with a common Memory Region and have different addresses and lengths or different access rights. In another embodiment, the first and second Memory Windows can be associated with different Memory Regions.

Method And Apparatus For Associating Memory Windows With Memory Regions In A Data Storage System

US Patent:
6691217, Feb 10, 2004
Filed:
May 24, 2001
Appl. No.:
09/864116
Inventors:
Bruce Leroy Beukema - Hayfield MN
David F. Craddock - New Paltz NY
Thomas Anthony Gregg - Highland NY
Renato John Recio - Austin TX
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1200
US Classification:
711170, 711171, 711172, 711173, 711203, 707205, 707206
Abstract:
A method, program and system for associating memory windows with memory regions in an infiniband data storage system are provided. The invention comprises registering a Memory Region, wherein the Memory Region is a set of virtually contiguous memory addresses defined by a virtual address and length. The system then establishes and maintains a Window Reference Count (WRC) for the Memory Region, which tracks the number of Memory Windows which are bound to the Memory Region. When the system binds a Memory Window to the Memory Region, the value of the WRC is incremented. When a Memory Window is unbound from the Memory Region, the value of the WRC is decremented. If no Memory Windows are bound to the Memory Region, the value of the WRC is zero. The Memory Region is not deregistered unless the value of the WRC equals zero.

Remote Direct Memory Access Enabled Network Interface Controller Switchover And Switchback Support

US Patent:
6721806, Apr 13, 2004
Filed:
Sep 5, 2002
Appl. No.:
10/235691
Inventors:
William Todd Boyd - Poughkeepsie NY
Douglas J. Joseph - Danbury CT
Michael Anthony Ko - San Jose CA
Renato John Recio - Austin TX
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1300
US Classification:
709312
Abstract:
A method, computer program product, and distributed data processing system for supporting RNIC (RDMA enabled NIC) switchover and switchback are provided. Using the mechanism provided in the present invention when a planned or unplanned outage occurs on a primary RNIC, all outstanding connections are switched over to an alternate RNIC, and the alternate RNIC continues communication processing. Additionally, using the mechanism provided in the present invention, connections can also be switched back.

Apparatus And Method For Managing Work And Completion Queues Using Head And Tail Pointers

US Patent:
6725296, Apr 20, 2004
Filed:
Jul 26, 2001
Appl. No.:
09/915663
Inventors:
David F. Craddock - New Paltz NY
Thomas Anthony Gregg - Highland NY
Ian David Judd - Winchester, GB
Gregory Francis Pfister - Austin TX
Renato John Recio - Austin TX
Donald William Schmidt - Stone Ridge NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 300
US Classification:
710 52, 710 57, 710112
Abstract:
An apparatus and method for managing work and completion queues using head and tail circular pointers. With the apparatus and method, queue head and tail pointers are maintained in the channel interface and the host channel adapter. The head and tail pointers in the host channel adapter include a queue pointer table index and a queue page index for identifying a position within the queue. For work queues, the tail pointer in the channel interface is used to identify a next position where a work queue entry may be written. The head pointer in the channel interface is used only to determine whether the work queue is full or not. The head pointer in the host channel adapter is used to identify a next work queue entry for processing by the host channel adapter. The tail pointer in the host channel adapter is used by the host channel adapter to determine if the queue is empty. For completion queues, the head pointer in the channel interface is used to identify a next completion queue entry to be processed.

Data Reordering Mechanism For High Performance Networks

US Patent:
6735647, May 11, 2004
Filed:
Sep 5, 2002
Appl. No.:
10/235697
Inventors:
William Todd Boyd - Poughkeepsie NY
Douglas J. Joseph - Danbury CT
Renato John Recio - Austin TX
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1300
US Classification:
710 52, 711144, 712218, 371394
Abstract:
An apparatus and method for reordering data at a data destination is provided. The apparatus and method provides dynamic, adaptive management of receive buffers in a host channel adapter while recovering on the fly the order of data sent over a medium that does not preserve order. In an exemplary embodiment, the method and apparatus provides a method and apparatus of reordering data of a data transmission received from a source device. The method and apparatus receives, in a data transfer buffer, a data packet transmitted over a connection associated with the source device and determines if the connection requires reordering of data packets. If the connection requires reordering of data packets, the data packet is transferred from the data transfer buffer to a reorder buffer and a reorder state cache is updated to reflect the transfer of the data packet to the reorder buffer. In response to receipt of a request to transfer data from the reorder buffer to the host memory, a next data packet sequence number is fetched from the reorder state cache and a position in the reorder buffer of the data associated with the next data packet sequence number entry is identified. The data is at this identified position is then transferred to the host memory.

Sharing Memory Tables Between Host Channel Adapters

US Patent:
6748499, Jun 8, 2004
Filed:
Nov 15, 2001
Appl. No.:
09/998403
Inventors:
Bruce Leroy Beukema - Hayfield MN
David F. Craddock - New Paltz NY
Thomas Anthony Gregg - Highland NY
Renato John Recio - Austin TX
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1214
US Classification:
711147, 711152, 711163
Abstract:
A method, computer program product, and data processing system for sharing memory protection tables and address translation tables among multiple Host Channel Adapters are disclosed. The protection and address translation tables for a shared memory region are written in memory of the host. The Host Channel Adapters are registered with the memory region so that each adapter stores an address pointer to the tables. In this way, the tables need not be duplicated for each adapter.

Isbn (Books And Publications)

El Libro De Oro: La Habana

Author:
Renato Recio
ISBN #:
8847601479

El Libro De Oro: Cuba

Author:
Renato Recio
ISBN #:
8847601851

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