Carl R Christensen, 551720 E Ramona Ave, Salt Lake City, UT 84108

7167479, Jan 23, 2007

Jun 17, 2003

10/518580

Carl L. Christensen - South Jordan UT, US
David Lynn Bytheway - South Jordan UT, US

Thomson Licensing - Boulogne-Billancourt

H04L 12/56

370401, 370219, 370422

Supportably mounted by each chassis of a multi-chassis broadcast router are primary router matrix cards, redundant router matrix cards and clock-demanding input and output cards. A first master clock resides on the primary router matrix card of a first chassis while a second master clock resides on the redundant router matrix card of a second chassis. Each master clock is configured to provide a respective common clock signal to all of the input and output cards of the first and second chassis. Control logic determines whether the first master clock or the second master clock issues the common clock signal.

7243296, Jul 10, 2007

Jun 17, 2003

10/518226

Carl Christensen - South Jordan UT, US

Thomson Licensing - Boulogne-Billancourt

G06F 11/00
H03M 13/00

714800, 714804, 714758

An iterative method of correcting errors in a data block. Bad bytes are first identified using information derived from an 8B/10B decoding of the data block. Within each identified bad byte, suspect bits are subsequently identified using information derived from parity decoding of a row of the data block. Each suspect bit is then classified as either a confirmed error bit or an unconfirmed error bit using information derived from parity decoding of a column of the data block in which the suspect bit is located. Confirmed error bits are then corrected, the parity bits corresponding to the confirmed error bit reset, and the bad byte cleared. The process is then repeated if one or more bad bytes remain in the data block.

7710859, May 4, 2010

Jun 13, 2003

10/518670

Carl L. Christensen - South Jordan UT, US
Marc Stuart Walker - Taylorsville UT, US
David Kim Blair - Taylorsville UT, US
David Lynn Blytheway - Murray UT, US
Lynn Howard Arbuckle - Bountiful UT, US

Thomson Licensing - Boulogne-Billancourt

H04L 12/26

370216, 370244

A fault-tolerant router includes first and second router matrix card. The first and second router matrix cards receive a common set of 4n parity encoded input digital audio data streams and respectively generates therefrom, first and second sets of M output digital audio streams. As the first and second sets of data streams propagate along the first and second router matrix cards, respectively, one or more health bits are set whenever an error or other type of fault condition is detected. First and second parity check circuits are configured to detect parity errors and/or assess the relative health of the first and second sets of data streams and one of the two sets of data streams is selected as the output of the fault-tolerant router based upon either the parity error analysis, health analysis or both.

7747447, Jun 29, 2010

Jun 20, 2003

10/519000

Carl Christensen - South Jordan UT, US
Lynn Howard Arbuckle - Bountiful UT, US

Thomson Licensing - Boulogne-Billancourt

G10L 19/00

704500, 7042001, 704245, 700 94, 370389, 36912408, 3691248

A bi-phase decoder suitable for use in a broadcast router and an associated method for extracting subframes of digital audio data from a stream of digital audio data. Logical circuitry within the bi-phase decoder extracts subframes of the digital audio data by constructing a transition window from an estimated bit time, sampling the stream of digital audio data using a fast clock and applying the sampled stream of digital audio data to the transition window to identify transitions indicative of preambles of the subframes of digital audio data.

7778155, Aug 17, 2010

Jun 17, 2003

10/518278

Carl Christensen - South Jordan UT, US

Thomson Licensing - Boulogne-Billancourt

H04L 1/00

370216, 370390, 370503, 348513

A broadcast router includes a router matrix having input and output sides. Coupled to the input side of the router matrix are first and second reference inputs. The first reference input is configured for application of a first reference signal thereto while the second reference input is configured for selective application of either a second reference signal or a redundancy of the first reference signal thereto. The broadcast router further includes N inputs, M outputs and a routing engine, coupled between the N inputs and the M outputs, for applying selected ones of the N inputs to the M outputs. A reference select circuit is coupled between the first and second reference inputs and the routing engine.

7805766, Sep 28, 2010

Jun 13, 2003

10/519157

Carl L. Christensen - South Jordan UT, US
Charles L. Johnson - Taylorsville UT, US
Lynn Howard Arbuckle - Bountiful UT, US

Thomson Licensing - Boulogne-Billancourt

G06F 15/16
G06F 9/00
G06F 12/14
G06F 3/00
G06F 13/00
G08B 29/00
H04L 29/06

726 34, 726 10, 713 1, 713153, 713165, 713189, 710 8, 710 15, 710104

A broadcast router includes plural input cards, first and second router matrix card and plural output cards. Programmable devices residing on the cards requiring configuration issue a request for configuration to a main controller which resides, with a shared configuration information repository on a configuration control card. After a period of time which allows additional programmable devices to request configuration elapses, the main controller polls the programmable devices residing on the cards to determine which of the programmable devices had requested configuration and, using the configuration information maintained in the shared configuration information repository, configures each programmable device which had requested configuration.

7957371, Jun 7, 2011

Jun 16, 2003

10/518211

Carl L. Christensen - South Jordan UT, US
David Lynn Bytheway - Murray UT, US
Mitchell T. Hayden - Syracuse UT, US

GVBB Holdings S.A.R.L. - Luxembourg

H04Q 11/00

370362, 370387, 370400, 709238, 326 41

A linearly expandable router is comprised of first, second, third and fourth router components. First, second and third discrete links couple an input side of a routing engine of the first router component () to an input side of a routing engine of the second, third and fourth router components. Similarly, fourth and fifth discrete links couple the input side of the routing engine for the second router component to the input side of the routing engine of the third and fourth router components, respectively. Finally, a sixth discrete link couples the input side of the routing engine for the third router component to the input side of the router engine for the fourth router component.

8000230, Aug 16, 2011

Jun 13, 2003

10/518212

Carl Christensen - South Jordan UT, US
David Lynn Bytheway - Murray UT, US
Mitchell T. Hayden - Syracuse UT, US

GVBB Holdings S.A.R.L. - Luxembourg

G01R 31/08

370219, 370220, 370222

A fully redundant linearly expandable router is comprised of first, second, third and fourth router components. Each router component includes first and second routing engines. First, second and third discrete links couple the first routing engine to the first routing engines, respectively. Fourth and fifth discrete links couple the first routing engine to the first routing engines, respectively. A sixth discrete link couples the routing engine to the routing engine. Seventh, eighth and ninth discrete links couple the second routing engine to the second routing engines, respectively. Tenth and eleventh discrete links couple the second routing engine to the second routing engines, respectively. A twelfth discrete link couples the routing engine to the router engine.