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Robert J Greener, 6213650 85Th Ave, Chippewa Falls, WI 54729

Known as:
Robert K Greener Bob J Greener Robt J Greener Bobby Greener
Related to:
Kristin Marie Greener 30

Robert Greener Phones & Addresses

Chippewa Falls, WI   

Estero, FL   

Du Bois, PA   

Chippewa Falls, WI   

Work

Company: Law Office of Robert L. Greener P.C. Address:
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Career records & work history

Lawyers & Attorneys

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Robert Greener - Lawyer

Office:
Law Office of Robert L. Greener P.C.
Specialties:
Intellectual Property, Intellectual Property Infringement, Commercial Law, Construction Law, Litigation, Buying and Selling of Businesses, Corporate Formation, General Business Matters, Trademark, Copyright, Entertainment Law, Art Law and Licensing, Small Business Law, Mechanics Liens, Copyright Application, Films and Animation, Construction Contracts, Commercial Contracts
ISLN:
910605418
Admitted:
1989
University:
State University of New York, New York College at Oneonta,, B.A., 1985
Law School:
Hofstra University Law School, J.D., 1985

Robert Greener resumes & CV records

Resumes

Robert Greener Photo 44

Robert Greener

Robert Greener Photo 45

Robert Greener

Location:
United States
Robert Greener Photo 46

Senior Design Engineer At Silicon Logic Engineering

Location:
Eau Claire, Wisconsin Area
Industry:
Design

Publications & IP owners

Us Patents

Subchip Boundary Constraints For Circuit Layout

US Patent:
2007022, Sep 27, 2007
Filed:
Mar 27, 2006
Appl. No.:
11/277569
Inventors:
Robert Greener - Chippewa Falls WI, US
Chris Gorzek - Eau Claire WI, US
International Classification:
G06F 17/50
US Classification:
703019000
Abstract:
An electric circuit is laid out through a process comprising estimating signal propagation time in an interface between a source and a destination subcircuit, calculating a margin time based on the difference between a clock period and the estimated signal propagation time, and distributing the calculated margin time to at least one of the source and destination subcircuits.

Method And Apparatus For Adjusting The Power Supply Voltage Provided To A Microprocessor

US Patent:
5694028, Dec 2, 1997
Filed:
May 20, 1996
Appl. No.:
8/650337
Inventors:
Richard B. Salmonson - Chippewa Falls WI
Robert J. Greener - Chippewa Falls WI
Mark Ronald Sikkink - Chippewa Falls WI
Robert J. Lutz - Chippewa Falls WI
Max C. Logan - Chippewa Falls WI
Richard G. Finstad - Eau Claire WI
Assignee:
Cray Research, Inc. - Eagan MN
International Classification:
G05F 144
US Classification:
323273
Abstract:
A method and apparatus for adjusting power supplied to a device when the device has a first and a second power input. A first voltage level and a ground potential are provided and a second voltage level is created as a function of the first voltage level. The second voltage level is then buffered with a power transistor and, if the second voltage level is needed for a particular device, the buffered second voltage level is selectively applied to the device. The circuit is disabled when the second voltage supply is not needed.

Possible Relatives

David M Greener  Dean R Greener  Edward P Greener  Garth H Greener  Gary A Greener  Gina Greener  Harry J Greener  Robert P Johnson  Robert Stan  Robert D Stanard 

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