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Robert W Shanley, 4642 Brookside Ave, Old Bridge, NJ 08857

Robert Shanley Phones & Addresses

42 Brookside Ave, Old Bridge, NJ 08857    732-9528301   

11 Pero Ct, Sayreville, NJ 08872    732-7273624   

Toms River, NJ   

Palmyra, NJ   

42 Brookside Ave, Old Bridge, NJ 08857   

Work

Position: Clerical/White Collar

Education

Degree: Associate degree or higher

Mentions for Robert W Shanley

Publications & IP owners

Us Patents

Methods Of Simulating Vulnerability

US Patent:
2008009, Apr 24, 2008
Filed:
Oct 23, 2006
Appl. No.:
11/584598
Inventors:
Paul F. O'Rourke - Basking Ridge NJ, US
Robert J. Shanley - Morristown NJ, US
International Classification:
G06F 11/00
G06F 12/14
G06F 12/16
G06F 15/18
G08B 23/00
US Classification:
726 25
Abstract:
Methods of simulating vulnerability are provided. In an example, multi-stage vulnerability across multiple systems may be simulated by first simulating a probing of at least one intermediate entity, the at least one intermediate entity connected to a target system, second simulating a probing of the target system if the first simulated probing is successful and generating an attack graph based on the results of the first and second simulating steps. In another example, multi-system vulnerability may be simulated by receiving a plurality of attributes associated with vulnerabilities of a plurality of systems within a network, the plurality of systems including at least one target system and generating an attack graph including one or more attack chains based at least in part on the received plurality of attributes. In another example, system (e.g., single-system) vulnerability may be simulated by first simulating whether vulnerabilities exploited from a first system state cause a transition to a second system state, the second system state having a higher-privilege level than the first system state within a target system and generating an attack graph based at least in part on the results of the simulation.

Amplifier Incorporating Gain Distribution Control For Cascaded Amplifying Stages

US Patent:
4464633, Aug 7, 1984
Filed:
Mar 31, 1982
Appl. No.:
6/363869
Inventors:
Leopold A. Harwood - Bridgewater NJ
Robert L. Shanley - Indianapolis IN
Assignee:
RCA Corporation - NY
International Classification:
H03G 330
US Classification:
330254
Abstract:
A pair of differential amplifier stages are connected in cascade to form a multistage amplifier for signal amplification purposes. The base-emitter paths of current source transistors which establish the operating currents for the respective stages are connected in series across a common source of forward bias voltage. The collector-emitter path of an additional transistor is shunted across the base-emitter path of one of the current source transistors. As biasing of the additional transistor is varied, the distribution of gain between the respective cascaded stages is altered substantially without disturbance of the overall gain of the multistage amplifier.

Color-Difference Signal Processing Circuits

US Patent:
4272778, Jun 9, 1981
Filed:
Mar 3, 1980
Appl. No.:
6/126783
Inventors:
Leopold A. Harwood - Bridgewater NJ
Robert L. Shanley - Indianapolis IN
Assignee:
RCA Corporation - New York NY
International Classification:
H04N 950
H04N 952
US Classification:
358 23
Abstract:
A first resistive current path is DC connected between respective output terminals of push-pull color demodulator. A second resistive current path is DC connected between respective output terminals of a second push-pull color demodulator. An output color-difference signal is formed by a differential amplifier having one input DC connected to an asymmetrically positioned point in first resistive current path, and a second input DC connected to an asymmetrically positioned point in second resistive current path. Output color-difference signal corresponds to a combination of the demodulated signals, with a polarity relationship and magnitude ratio determined by the asymmetry of positioning of the takeoff points in the respective current paths. Output quiescent voltage is independent of the asymmetry of positioning of the takeoff points.

Adjustable Coring Circuit

US Patent:
4441121, Apr 3, 1984
Filed:
Jan 25, 1983
Appl. No.:
6/460985
Inventors:
Leopold A. Harwood - Bridgewater NJ
Robert L. Shanley - Indianapolis IN
Assignee:
RCA Corporation - New York NY
International Classification:
H04N 9535
H04N 514
US Classification:
358 36
Abstract:
Signals to be cored are applied to the inputs of a linear signal amplifier, and of a multistage limiting amplifier having cascaded input and output amplifying stages. A cored version of the signals, corresponding to the difference between a linearly translated version of the signals and a doubly clipped version thereof, is developed by a signal combiner responsive to the outputs of both amplifiers. A variable coring level control voltage controls the distribution of gain between the input and output amplifying stages, substantially without disturbing the overall gain of the limiting amplifier, which is set to match the overall gain of the linear amplifier. In an illustrative embodiment, the signals which are adjustably cored are horizontal peaking signals derived from the received luminance signal in a color television receiver. An automatic peaking control system associated with output of the adjustable coring circuit opposes changes in peaking level that might otherwise accompany coring level adjustment.

Video Signal Peaking Control System With Provision For Automatic And Manual Control

US Patent:
4399460, Aug 16, 1983
Filed:
Oct 9, 1981
Appl. No.:
6/310139
Inventors:
Leopold A. Harwood - Bridgewater NJ
Robert L. Shanley - Indianapolis IN
James Hettiger - Indianapolis IN
Assignee:
RCA Corporation - New York NY
International Classification:
H04N 514
H04N 552
H03K 100
US Classification:
358166
Abstract:
A DC coupled system for automatically controlling the high frequency peaking content of a video signal is disclosed. The system includes a DC coupled control path comprising a peak detector for developing a control voltage representative of the high frequency content of the video signal exclusive of video signal DC components, and is preceded by a video signal amplifier. A filter for shaping the frequency response of the control path is connected to the amplifier. A manually adjustable peaking control for controlling the DC bias of the amplifier is also connected to the amplifier. The filter and adjustable peaking control exhibit mutually independent operation, and are both connected to the amplifier via the same single terminal.

Predictably Biased Dc Coupled Video Signal Peaking Control System

US Patent:
4388647, Jun 14, 1983
Filed:
Oct 9, 1981
Appl. No.:
6/310137
Inventors:
Leopold A. Harwood - Bridgewater NJ
Robert L. Shanley - Indianapolis IN
James Hettiger - Indianapolis IN
Assignee:
RCA Corporation - New York NY
International Classification:
H04N 514
US Classification:
358166
Abstract:
A DC coupled system for automatically controlling the high frequency peaking content of a video signal is disclosed. A peak detector develops a control voltage representative of the high frequency content of the video signal. The control voltage controls a differential control input peaking signal splitter to provide controlled amounts of complementary phased peaking signals, which are differentially combined with complimentary phased video signals to produce a controllably peaked video signal. The differential control inputs of the peaking signal splitter receive balanced quiescent bias from symmetrical bias coupling networks, one of which includes the peak detector.

Circuit For Linearly Gain Controlling A Differential Amplifier

US Patent:
4426625, Jan 17, 1984
Filed:
Aug 27, 1981
Appl. No.:
6/296865
Inventors:
Leopold A. Harwood - Bridgewater NJ
Robert L. Shanley - Indianapolis IN
Assignee:
RCA Corporation - New York NY
International Classification:
H03F 345
H03G 330
US Classification:
330254
Abstract:
A circuit for linearly controlling the gain of a differential amplifier includes a differentially connected current splitter network biased by means of a symmetrical bias circuit coupled to a common operating potential and including first and second current sources with associated first and second impedances. The current splitter includes a diode exhibiting a non-linear voltage in response to linear current conduction, and a transistor. The bias circuit responds to a variable gain control voltage for causing the diode to conduct current which varies linearly with the gain control voltage. First and second mutually differential control voltages derived from the transistor and diode, including a non-linearly varying voltage exhibited by the diode, are applied to the differential amplifier for controlling the conduction of the differential amplifier linearly with respect to the original control voltage.

Frequency Selective Dc Coupled Video Signal Control System Insensitive To Video Signal Dc Components

US Patent:
4388648, Jun 14, 1983
Filed:
Oct 9, 1981
Appl. No.:
6/310138
Inventors:
Leopold A. Harwood - Bridgewater NJ
Robert L. Shanley - Indianapolis IN
James Hettiger - Indianapolis IN
Assignee:
RCA Corporation - New York NY
International Classification:
H04N 514
US Classification:
358166
Abstract:
A DC coupled system for automatically controlling the high frequency peaking content of a video signal is disclosed. The system includes a DC coupled control path comprising a peak detector for developing a control voltage representative of the high frequency content of the video signal exclusive of video signal DC components. The detector is preceded in the control path by a frequency selective network comprising an amplifier and a filter for shaping the frequency response of the control path such that high frequency video signal components exclusive of DC video signal components are passed to the peak detector. The frequency selective network comprises the cascode combination of a video signal amplifier transistor and a current source transistor which provides quiescent operating currents for the amplifier transistor. The filter is coupled to the junction of the amplifier and current source transistors, and includes a DC blocking network coupled between the junction and a point of reference potential.

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