Satyajit S Dutta, 846102 Bon Terra Dr, Austin, TX 78731

6337884, Jan 8, 2002

Jun 12, 1998

09/096502

Tai Cao - Austin TX
Satyajit Dutta - Austin TX
Thai Quoc Nguyen - Austin TX
Thanh Doan Trinh - Austin TX
Lloyd Andre Walls - Austin TX

International Business Machines Corporation - Armonk NY

H04B 300

375257, 375288

The present invention allows for the simultaneous transmission of two digital signals from one integrated circuit to another. The two digital signals are encoded utilizing a voltage divider circuit and are then transmitted by one transmission line to the second integrated circuit chip. The second integrated circuit chip decodes the first digital signal and then utilizes this decoded digital signal to further decode the second digital signal.

7366036, Apr 29, 2008

Jan 13, 2006

11/331618

Zhibin Cheng - Cary NC, US
Satyajit Dutta - Austin TX, US
Peter J. Klim - Austin TX, US

International Business Machines Corporation - Armonk NY

G11C 5/14

36518909

A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

7542329, Jun 2, 2009

Jul 19, 2006

11/458616

Zhibin Cheng - Cary NC, US
Satyajit Dutta - Austin TX, US
Peter J. Klim - Austin TX, US

International Business Machines Corporation - Armonk NY

G11C 11/00

365154, 365 4911, 365196

Methods and apparatuses to decrease power consumption and reduce leakage current of integrated circuits are disclosed. New leakage power saving techniques for various types of integrated circuits, including cache memory circuits, are discussed. Embodiments comprise methods and apparatuses to reduce power consumption in integrated circuits by using virtual voltage rails, or virtual power rails, to supply power to integrated circuit loads. The methods and apparatuses generally involve using one or two virtual power control devices to “head” and “foot”, or sandwich, the integrated circuit loads from firm power supply rails. In these method embodiments, one or more elements sense the voltage of the virtual power rails, or nodes, and make adjustments to control the voltage at certain “virtual” voltage potentials. While controlling the voltage in this manner, the virtual power control devices may serve to restrict unnecessary current flow through the integrated circuit loads.

7683670, Mar 23, 2010

May 31, 2006

11/421457

Zhibin Cheng - Cary NC, US
Satyajit Dutta - Austin TX, US
Peter J. Klim - Austin TX, US

International Business Machines Corporation - Armonk NY

H03K 19/0175
H03K 19/094

326 83, 326 82, 326 84, 326 85, 326 86

Embodiments that decrease power consumption of interconnecting devices in integrated circuits are disclosed. Embodiments reduce power consumption in integrated circuits by generating full and reduced swing signals at an output of a driver module in response to a control signal during and deactivating one or more elements to conserve power after an input signal remains unchanged for a period of time. Another embodiment reduces power consumption in a circuit, the embodiment comprising a swing module coupled with a swing selector and an output controller. The swing module may generate full or low swing signals depending on the state of the swing selector. The output controller may increase the output impedance of the swing module after an input signal to the swing module remains unchanged for a quantity of time. Various apparatus embodiments include portable computing devices and cellular telephones.

7692976, Apr 6, 2010

Jul 19, 2007

11/780038

Zhibin B. Cheng - Cary NC, US
Satyajit Dutta - Austin TX, US
Peter J. Klim - Austin TX, US

International Business Machines Corporation - Armonk NY

G11C 5/14

36518909

A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

2007025, Nov 8, 2007

Jul 19, 2007

11/779991

Zhibin Cheng - Cary NC, US
Satyajit Dutta - Austin TX, US
Peter Klim - Austin TX, US

International Business Machines Corporation - Armonk NY

G05F 3/02

327544000

A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

5541535, Jul 30, 1996

Dec 16, 1994

8/357885

Tai A. Cao - Austin TX
Satyajit Dutta - Austin TX
Thai Q. Nguyen - Austin TX
Thanh D. Trinh - Austin TX
Lloyd A. Walls - Austin TX

International Business Machines Corporation - Armonk NY

H03K 190185

326 83

A CMOS driver/receiver pair is provided which includes a non-inverting buffer in the input path to a differential receiver circuit. The non-inverting buffer allows a plurality of different voltages, and corresponding voltage swings, to be possible. This allows the differential receiver to compare the input voltage received from the transmission line with the output from its associated driver. Therefore, the receiver is capable of determining the voltage level (and the corresponding logic level) input from the transmission at the same time its associated driver is outputting a logic signal to another driver/receiver pair, via the transmission line. A single voltage source is utilized to provide multiple positive voltages to the differential receivers, such that differences in voltage levels which correspond to different logical combinations of "1" and "0" can be determined by the receiver.

5530401, Jun 25, 1996

Jun 7, 1995

8/483906

Tai A. Cao - Austin TX
Satyajit Dutta - Austin TX

International Business Machines Corporation - Armonk NY

H03K 5153
H03K 524

327563

A circuit for supplying a reference voltage from a single data input voltage source is provided which utilizes a delay circuit in conjunction with a source follower circuit to provide a separate reference voltage to a differential circuit. The data input signal is provided concurrently to the source follower circuit and the delay. The source follower circuit includes an "N" type transistor which has its source connected to the source of a "P" type transistor. The delay circuit is provided to delay, or "hold off" the data input signal until the signal is through the source follower and ready for input to the differential circuit. By using the delay, the data input signal and the reference signal (output from the source follower) are input to the differential circuit simultaneously. The threshold voltage drop across the gate and source of the transistors in the source follower circuit provide the reference voltage, which follows the data input voltage. In this manner, hysterisis induced by the source follower circuit provides a reference voltage which can be used by a differential circuit, or the like and eliminate the need for two separate and distinct power supplies.