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Scott G O'Brien, 52Saint Paul, MN

Scott O'Brien Phones & Addresses

Saint Paul, MN   

Lenexa, KS   

Pataskala, OH   

1787 Walnut Ln, Saint Paul, MN 55122   

Work

Position: Executive, Administrative, and Managerial Occupations

Education

Degree: Bachelor's degree or higher

Mentions for Scott G O'Brien

Career records & work history

License Records

Scott C O'brien

Licenses:
License #: IFD01083 - Expired
Category: Embalming/Funeral Directing
Issued Date: Feb 22, 1999
Expiration Date: Feb 21, 2004
Type: Embalming Intern

Scott O'Brien resumes & CV records

Resumes

Scott O'Brien Photo 25

Scott O'brien

Industry:
Museums And Institutions
Work:
Vip Pre-Owned Jan 1970 - Dec 2000
No
Interests:
Children
Economic Empowerment
Civil Rights and Social Action
Education
Environment
Poverty Alleviation
Science and Technology
Disaster and Humanitarian Relief
Scott O'Brien Photo 26

Broker And Owner

Work:
OurIsland Real Estate since 2005
Broker/Owner
Skills:
Hospitality
Scott O'Brien Photo 27

Owner

Location:
777 Vista Ridge Ln, Shakopee, MN 55379
Industry:
Construction
Work:
Trident Development, LLC/ Concrete Inc since Jan 2005
Owner
Skills:
Entrepreneurship, Management, Real Estate, Construction, Small Business, Strategic Planning, Residential Homes, Customer Service, Negotiation, New Business Development, Sales Management, Contract Negotiation
Scott O'Brien Photo 28

Scott O'brien

Scott O'Brien Photo 29

Scott O'brien

Scott O'Brien Photo 30

Scott O'brien

Scott O'Brien Photo 31

Scott O'brien

Scott O'Brien Photo 32

Scott O'brien

Publications & IP owners

Us Patents

Disk Drive Writer With Active Reflection Cancellation

US Patent:
6879456, Apr 12, 2005
Filed:
Aug 15, 2002
Appl. No.:
10/219940
Inventors:
John D. Leighton - Anoka MN, US
Scott M. O'Brien - Eagan MN, US
Robert J. Wimmer - Hastings MN, US
Nameeta Krenz - Carver MN, US
Carl F. Elliott - Eden Prairie MN, US
Michael J. O'Brien - St. Paul MN, US
Cameron C. Rabe - Inver Grove Heights MN, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
G11B005/02
US Classification:
360 68, 360 67, 360 53, 360 46
Abstract:
A write driver circuit selectively provides a write current through a write head in first and second opposite directions. The write driver circuit is connected to the write head through an interconnect. The write driver circuit provides an incident write current signal through the interconnect to the write head, and also provides a reflection cancellation signal through the interconnect to the write head. In an exemplary embodiment, the incident write current signal is provided by providing an incident voltage signal across the write head, and the reflection cancellation signal is provided by providing a reflection cancellation voltage signal across the write head. In an exemplary embodiment, the reflection cancellation signal is a delayed and filtered version of the incident write current signal that cancels a reflected signal that is reflected at the interface between the interconnect and the write head due to impedance mismatching.

Pre-Amplifier Employing Transistors Having A Diminished Breakdown Voltage And A Disk Drive And A Thevenin Writer Employing The Same

US Patent:
7019923, Mar 28, 2006
Filed:
Apr 22, 2003
Appl. No.:
10/420236
Inventors:
John D. Leighton - Anoka MN, US
Hao Fang - Savage MN, US
Michael J. O'Brien - St. Paul MN, US
Scott O'Brien - Eagan MN, US
Cameron C. Rabe - Inver Grove Heights MN, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
G11B 5/09
US Classification:
360 46, 360 68, 330252, 327110
Abstract:
A pre-amplifier, a Thevenin writer and a disk drive employing transistors having a breakdown voltage below a circuitry operating voltage. In one embodiment, the pre-amplifier includes an emitter-follower transistor pair couplable to a power supply and a differential transistor pair, having a collector-emitter breakdown voltage below a voltage of the power supply, that receives current from, and controlled by, the emitter-follower transistor pair.

Integrated Bias And Offset Recovery Amplifier

US Patent:
7339760, Mar 4, 2008
Filed:
Sep 30, 2004
Appl. No.:
10/955775
Inventors:
Jeffrey A. Gleason - Burnsville MN, US
John D. Leighton - Anoka MN, US
Scott M. O'Brien - Eagan MN, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
G11B 5/02
US Classification:
360 67, 360 66, 360 68, 360 46
Abstract:
A preamplifier circuit is connected to a transducing head, and has integrated bias circuitry and offset recovery circuitry. The offset recovery circuitry is activated in response to a transition from write mode to read more to provide an output signal representative of a signal across the transducing head. The bias circuitry is driven by the output signal of the offset recovery circuitry to bias the transducing head.

Resistance Mode Comparator For Determining Head Resistance

US Patent:
7630159, Dec 8, 2009
Filed:
May 27, 2005
Appl. No.:
11/140262
Inventors:
Scott M. O'Brien - Bloomington MN, US
Michael P. Straub - Longmont CO, US
Jeffrey A. Gleason - Burnsville MN, US
Nameeta Krenz - Carver MN, US
Arvind Aemireddy - Irving TX, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
G11B 5/03
US Classification:
360 66, 360 46, 360 67, 360110, 360313
Abstract:
An apparatus and method for determining a resistance of a magneto-resistive head. A current drawn by the head, in response to a fixed bias voltage across the head, is converted to a zero temperature coefficient current such that when supplied to a resistor connected to an input terminal of a comparator the effects of variations in the resistance value are avoided. An output signal of the comparator indicates the resistance of the magneto-resistive head.

Magneto-Resistive Head Resistance Sensor

US Patent:
7724460, May 25, 2010
Filed:
Jan 13, 2005
Appl. No.:
11/034997
Inventors:
David J. Fitzgerald - Inver Grove Heights MN, US
Jeffrey A. Gleason - Burnsville MN, US
James P. Howley - Broomfield CO, US
Scott M. O'Brien - Eagan MN, US
Michael P. Straub - Longmont CO, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
G11B 5/02
G11B 5/03
G11B 5/09
US Classification:
360 67, 360 46, 360 66, G9B 5031, G9B 5026
Abstract:
A recording system employing a magneto-resistive (MR) element senses a resistance value of the MR element and generates one or more MR resistance (MRR) signal values based on the sensed MR element resistance value. The MRR signal values might be, for example, current or voltage values proportional or inversely proportional to the MR element resistance value. The MRR signal values might be employed to control one or more of: i) a unity gain bandwidth of a bias loop for the MR element, ii) an MR read head preamplifier low corner frequency, and iii) a slew rate across the MR element.

Disk Drive Writer With Capacitive Boost

US Patent:
2004003, Feb 19, 2004
Filed:
Aug 15, 2002
Appl. No.:
10/219948
Inventors:
John Leighton - Anoka MN, US
Scott O'Brien - Eagan MN, US
Robert Wimmer - Hastings MN, US
Nameeta Krenz - Carver MN, US
Carl Elliott - Eden Prairie MN, US
Michael O'Brien - St. Paul MN, US
Cameron Rabe - Inver Grove Heights MN, US
Assignee:
Agere Systems Inc.
International Classification:
G11B005/02
US Classification:
360/068000
Abstract:
A write driver circuit selectively provides write current through a write head in first and second opposite directions. First and second active devices are driven with first and second pre-drive signals. Third and fourth active devices are driven with third and fourth pre-drive signals. First and second pull-up resistances are provided respectively between the first and second active devices and a fixed voltage, and third and fourth pull-up resistances are provided respectively between the third and fourth active devices and the fixed voltage. A first capacitor is connected between the first active device and an intermediate point of the third pull-up resistance, and a second capacitor is connected between the second active device and an intermediate point of the fourth pull-up resistance.

Magnetic Recording System Using Pattern Dependent Writer Having Register Pages For Storing Write Currents

US Patent:
2017018, Jun 29, 2017
Filed:
Dec 28, 2015
Appl. No.:
14/979643
Inventors:
- Singapore, SG
Peter J. Windler - Fort collins CO, US
Bruce A. Wilson - San Jose CA, US
Jaydip Bhaumik - Longmont CO, US
Scott M. O'Brien - Mendota Heights MN, US
Jason P. Brenden - Woodbury MN, US
Jeffrey A. Gleason - Mendota Heights MN, US
Cameron C. Rabe - Mendota Heights MN, US
International Classification:
G11B 5/09
Abstract:
A storage system includes a magnetic write head, a magnetic storage medium, a channel circuit comprising a write data output, wherein the channel circuit is operable to process write data to be recorded on the magnetic storage medium by the magnetic write head, and a preamplifier operable to receive the write data from the channel circuit, wherein the preamplifier comprises a number of register pages configured to store pattern dependent write current characteristics for a variety of magnet lengths, and wherein the preamplifier is operable to retrieve the write current characteristics based on magnet lengths and to record data bits on the magnetic storage medium using the write current characteristics.

Fly Height Control For Hard Disk Drives

US Patent:
2014018, Jul 3, 2014
Filed:
Dec 31, 2012
Appl. No.:
13/731693
Inventors:
- Milpitas CA, US
Xuemin Yang - Edina MN, US
Scott M. O'Brien - Eden Prairie MN, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
G11B 5/60
US Classification:
360 39
Abstract:
A fly height control circuit includes an input node to receive a digital control signal, an output node to output a control current to a resistive heater element to adjust a spacing between a read/write head and a surface of a storage medium, and control circuitry to process the digital control signal and generate the output control current based on the digital control signal. The control circuitry generates a first reference current based at least in part on the control current output from the output node. The control circuitry controls a slew rate of the first reference current to generate a slew rate controlled reference current. The control circuitry generates a second reference current based on a feedback voltage at the output node. The control circuitry compares the slew rate controlled reference current with the second reference current to adjust the control current output from the output node.

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