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Srinath M Ramaswamy, 50624 Sundown Way, Plano, TX 75094

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624 Sundown Way, Plano, TX 75094    972-7626197   

Murphy, TX   

430 Buckingham Rd, Richardson, TX 75081    972-2312041    972-2344970   

5850 Belt Line Rd, Dallas, TX 75201    972-4901521   

Lizella, GA   

Lyndon Center, VT   

Tempe, AZ   

Chandler, AZ   

Phoenix, AZ   

Colton, TX   

Mentions for Srinath M Ramaswamy

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Resumes

Srinath Ramaswamy Photo 11

Distinguished Member Of Technical Staff

Location:
Dallas, TX
Industry:
Semiconductors
Work:
Texas Instruments
Distinguished Member of Technical Staff
Education:
Arizona State University 1998 - 2000
Masters, Master of Science In Electrical Engineering, Electronics
Skills:
Cmos, Design, Telecommunications
Srinath Ramaswamy Photo 12

Srinath Ramaswamy

Srinath Ramaswamy Photo 13

Srinath Ramaswamy

Publications & IP owners

Us Patents

Systems For Pseudo-Bd Modulation

US Patent:
7279966, Oct 9, 2007
Filed:
Jul 29, 2005
Appl. No.:
11/193871
Inventors:
Jagadeesh Krishnan - Dallas TX, US
Srinath Mathur Ramaswamy - Dallas TX, US
Gangadhar Burra - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03F 3/38
US Classification:
330 10, 330251
Abstract:
An amplifier system in accordance with an aspect of the present invention comprises a switching amplifier that drives a load with a pulse-width modulated (PWM) output signal that varies between first and second rails based on a first control input signal, and a common mode supply that provides a switching signal that varies between third and fourth rails to maintain a common mode voltage of the load at a level that is between the first and second rails.

Common-Mode Technique For A Digital I/P Class D Loop

US Patent:
7414471, Aug 19, 2008
Filed:
Jun 6, 2006
Appl. No.:
11/422509
Inventors:
Jagadeesh Krishnan - Dallas TX, US
Srinath M Ramaswamy - Dallas TX, US
Gangadhar Burra - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03F 3/217
H03F 3/38
US Classification:
330251, 330207 A
Abstract:
A closed loop amplifier adapted to be directly connected to a battery having a battery voltage for powering the amplifier. The amplifier includes an amplifier stage having a node for receiving a control voltage for controlling a common mode voltage of the stage, a digital voltage indicator for generating a digital value corresponding to the battery voltage, and a common mode voltage supply providing the control voltage corresponding to the digital value.

Summing Comparator For Higher Order Class D Amplifiers

US Patent:
7498879, Mar 3, 2009
Filed:
Mar 27, 2006
Appl. No.:
11/389709
Inventors:
Jagadeesh Krishnan - Dallas TX, US
Srinath M. Ramaswamy - Dallas TX, US
Gangadhar Burra - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03F 3/217
US Classification:
330251, 330310, 330 69, 330302
Abstract:
The summing comparator includes: a first integrator; a second integrator for receiving an output of the first integrator; and a comparator for switching when the output of the first integrator is greater than the output of the second integrator. The outputs of the first and second integrators are directly compared by the comparator without the necessity of a summing amplifier.

Adaptive Digital Audio Pre-Distortion In An Audio Digital To Analog Converter

US Patent:
7786915, Aug 31, 2010
Filed:
Mar 23, 2009
Appl. No.:
12/383351
Inventors:
Halil Kiper - Dallas TX, US
Srinath Mathur Ramaswamy - Richardson TX, US
Gangadhar Burra - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03M 1/66
US Classification:
341144, 375296
Abstract:
An adaptive digital pre-distortion block is used to cancel device nonlinearities to improve the overall linearity of a Delta-Sigma DAC system. In particular, the pre-distortion block may be implemented all in digital components and utilize programmable registers that change the pre-distortion transfer function either statically or dynamically, or both. Static changes can be for variation in process corners during production, whereas, dynamic changes can be used to correct nonlinear changes that can occur from environmental reasons such as voltage, temperature, aging and device stress.

Power Tuning System And Method For Power Amplifier

US Patent:
8121561, Feb 21, 2012
Filed:
Jan 6, 2010
Appl. No.:
12/683012
Inventors:
Mehmet T. Ozgun - Plano TX, US
Luis E. Ossa - Plano TX, US
Brian P. Ginsburg - Allen TX, US
Srinath M. Ramaswamy - Murphy TX, US
Zahir I. Parkar - Bangalore, IN
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H04B 1/04
US Classification:
455125, 4551271, 4551272, 4551151, 455123, 330129
Abstract:
An automatic power tuning system and method, and a transmitter employing either the system or the method. In one embodiment, the system includes: (1) a power detector circuit coupled to an output of a transmitter, the transmitter having an integrator with a first, reference integrator current power control input, a second, integrator capacitor power control input and a plurality of driver fingers selectably employable by a third, driver finger power control input, the power detector configured to generate signals indicating an output voltage of the transmitter and (2) a digital processing circuit coupled to the power detector circuit and configured to employ the signals to determine at least near-optimum reference integrator current and integrator capacitor settings and select a number of driver fingers to employ to drive the output voltage.

System And Method For Dynamically Switching Between Low And High Frequency Reference Clock To Pll And Minimizing Pll Output Frequency Changes

US Patent:
8125253, Feb 28, 2012
Filed:
Nov 2, 2009
Appl. No.:
12/610438
Inventors:
Stanley Goldman - Dallas TX, US
Srinath Ramaswamy - Murphy TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03L 7/06
US Classification:
327156, 327147, 327163, 331 1 R, 331 18
Abstract:
A circuit is provided for use with a clock having an input divider portion, a feedback divider portion, a phase detector portion, a loop compensation filter portion and a voltage controlled oscillator portion. The input divider portion receives a reference signal and outputs a divided reference signal. The feedback divider portion receives an output signal from the circuit and outputs a divided feedback signal. The phase detector portion outputs a phase detector signal based on the divided reference signal and the divided feedback signal. The loop compensation filter portion outputs a tuning signal based on the phase detector signal. The voltage controlled oscillator portion output the outputs a signal based on the tuning signal. The phase detector portion changes the phase detector signal based on the input divider portion receiving the control signal and the feedback divider portion receiving the control signal.

Segmented Power Amplifier With Varying Segment Activation

US Patent:
8138829, Mar 20, 2012
Filed:
May 27, 2010
Appl. No.:
12/789342
Inventors:
Vijay Kumar Reddy - Plano TX, US
Srikanth Krishnan - Richardson TX, US
Brian P Ginsburg - Allen TX, US
Srinath Mathur Ramaswamy - Murphy TX, US
Chih-Ming Hung - Mckinney TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03F 1/14
US Classification:
330 51, 330295, 330124 R
Abstract:
Various apparatuses and methods for varying segment activation in a segmented power amplifier are disclosed herein. For example, some embodiments provide a power amplifier including an input, an output, a plurality of amplifier segments and a controller. The amplifier segments are connected in parallel between the input and the output and are adapted to be activated and inactivated. The power level at the output may be controlled by changing a number of the amplifier segments that are activated concurrently. The controller is connected to the amplifier segments and is adapted to vary which of the amplifier segments are activated to arrive at a selected number of activated amplifier segments.

Automatic Frequency Tuning System And Method For An Fm-Band Transmit Power Amplifier

US Patent:
8140027, Mar 20, 2012
Filed:
Oct 16, 2008
Appl. No.:
12/253217
Inventors:
Mehmet T. Ozgun - Plano TX, US
Luis E. Ossa - Plano TX, US
Brian P. Ginsburg - Allen TX, US
Srinath M. Ramaswamy - Murphy TX, US
Zahir I. Parkar - Bangalore, IN
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01Q 11/12
H04B 1/04
US Classification:
455 91, 455125, 4551271
Abstract:
An automatic frequency tuning system and method for a transmit power amplifier. The transmit power amplifier has an antenna feed line including a series capacitor and is coupled to an output of an output driver. In one embodiment, the system includes: (1) a shunt capacitor array having a plurality of capacitors selectably couplable to the antenna feed line to apply a programmable shunt capacitance thereto, (2) a peak detector circuit couplable to nodes of the antenna feed line associated with both terminals of the series capacitor and (3) a processor configured to control the peak detector circuit to determine a ratio of voltage levels measured at the nodes at a given power level of the output driver.

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