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Thomas Ho, 5810302 Aviary Dr, San Diego, CA 92131

Thomas Ho Phones & Addresses

10302 Aviary Dr, San Diego, CA 92131   

Cupertino, CA   

Sunnyvale, CA   

Fremont, CA   

San Jose, CA   

Milwaukee, WI   

Mentions for Thomas Ho

Career records & work history

Lawyers & Attorneys

Thomas Ho Photo 1

Thomas Yih Ho - Lawyer

Licenses:
Virginia - Authorized to practice law 2008
Thomas Ho Photo 2

Thomas Ho - Lawyer

Office:
Bookoff McAndrews, PLLC
Specialties:
Patents, Patent Prosecution, Mechanical Patents, Electro-Mechanical Patents, Patent Application, Patent Infringement
ISLN:
920601080
Admitted:
2008
University:
Pennsylvania State University, B.S., 2001
Law School:
Georgetown University Law Center, J.D., 2008

Medicine Doctors

Thomas D. Ho

Specialties:
Pediatrics
Work:
Ringgold Pediatric Clinic
7494 Battlefield Pkwy, Ringgold, GA 30736
706-9355437 (phone) 706-9353004 (fax)
Education:
Medical School
Univ Claude Bernard, U.e.r. De Med Grange Blanche, Lyon, (lyon I)
Graduated: 1986
Procedures:
Destruction of Benign/Premalignant Skin Lesions, Hearing Evaluation, Psychological and Neuropsychological Tests, Vaccine Administration
Conditions:
Abdominal Hernia, Acute Conjunctivitis, Acute Upper Respiratory Tract Infections, Atopic Dermatitis, Autism, Constipation, Hearing Loss, Plantar Warts, Urinary Incontinence, Acute Bronchitis, Acute Otitis Externa, Acute Pharyngitis, Acute Sinusitis, Allergic Rhinitis, Anemia, Anxiety Dissociative and Somatoform Disorders, Anxiety Phobic Disorders, Attention Deficit Disorder (ADD), Bronchial Asthma, Burns, Chronic Sinusitis, Congenital Anomalies of the Heart, Croup, Dehydration, Deviated Nasal Septum, Eating Disorders, Epilepsy, Gingival and Periodontal Diseases, Inguinal Hernia, Obsessive-Compulsive Disorder (OCD), Orbital Infection, Otitis Media, Pertussis, Pneumonia, Poisoning by Drugs, Meds, or Biological Substances, Post Traumatic Stress Disorder (PTSD), Skin and Subcutaneous Infections, Undescended and Retractile Testicle, Ventral Hernia
Languages:
English, French, Spanish, Vietnamese
Description:
Dr. Ho graduated from the Univ Claude Bernard, U.e.r. De Med Grange Blanche, Lyon, (lyon I) in 1986. He works in Ringgold, GA and specializes in Pediatrics. Dr. Ho is affiliated with Cornerstone Medical Center.

Thomas C. Ho

Specialties:
Family Medicine
Work:
North Country Healthcare
2920 N 4 St, Flagstaff, AZ 86004
928-2136100 (phone) 928-7744808 (fax)
Education:
Medical School
Temple University School of Medicine
Graduated: 1999
Procedures:
Arthrocentesis, Destruction of Benign/Premalignant Skin Lesions, Electrocardiogram (EKG or ECG), Skin Tags Removal, Vaccine Administration
Conditions:
Acne, Acute Pharyngitis, Anxiety Phobic Disorders, Carpel Tunnel Syndrome, Constipation, Contact Dermatitis, Gastroesophageal Reflux Disease (GERD), Gout, Infectious Liver Disease, Intervertebral Disc Degeneration, Ischemic Heart Disease, Migraine Headache, Non-Toxic Goiter, Osteoarthritis, Overweight and Obesity, Peripheral Nerve Disorders, Plantar Warts, Sciatica, Substance Abuse and/or Dependency, Tinea Unguium, Abdominal Hernia, Abnormal Vaginal Bleeding, Acute Bronchitis, Acute Pancreatitis, Acute Renal Failure, Acute Sinusitis, Acute Upper Respiratory Tract Infections, Alcohol Dependence, Alopecia Areata, Anal or Rectal Abscess, Anemia, Angina Pectoris, Anxiety Dissociative and Somatoform Disorders, Atrial Fibrillation and Atrial Flutter, Benign Prostatic Hypertrophy, Bipolar Disorder, Bronchial Asthma, Burns, Candidiasis, Candidiasis of Vulva and Vagina, Cataract, Chronic Bronchitis, Chronic Pancreatitis, Chronic Renal Disease, Cirrhosis, Conduction Disorders, Congenital Anomalies of the Heart, Depressive Disorders, Dermatitis, Diabetes Mellitus (DM), Disorders of Lipoid Metabolism, Diverticulosis, Epilepsy, Erectile Dysfunction (ED), Fractures, Dislocations, Derangement, and Sprains, Gastritis and Duodenitis, Gastrointestinal Hemorrhage, Glaucoma, Hallux Valgus, Hearing Loss, Heart Failure, Hemorrhoids, Herpes Genitalis, Herpes Simplex, HIV Infection, Hypertension (HTN), Hyperthyroidism, Hypothyroidism, Inflammatory Bowel Disease (IBD), Inguinal Hernia, Intracranial Injury, Iron Deficiency Anemia, Ischemic Stroke, Lateral Epicondylitis, Malignant Neoplasm of Female Breast, Melanoma, Menopausal and Postmenopausal Disorders, Multiple Sclerosis (MS), Nephrotic Syndrome, Obstructive Sleep Apnea, Osteomyelitis, Osteoporosis, Otitis Media, Peptic Ulcer Disease, Phlebitis and Thrombophlebitis, Plantar Fascitis, Pneumonia, Post Traumatic Stress Disorder (PTSD), Prostatitis, Psoriasis, Pulmonary Embolism, Restless Leg Syndrome, Retinal Detachments, Rheumatoid Arthritis, Rotator Cuff Syndrome and Allied Disorders, Schizophrenia, Scoliosis or Kyphoscoliosis, Sexually Transmitted Diseases (STDs), Skin and Subcutaneous Infections, Skin Cancer, Spinal Stenosis, Tempromandibular Joint Disorders (TMJ), Tension Headache, Thyroiditis, Tinea Pedis, Urinary Incontinence, Urinary Tract Infection (UT), Varicose Veins, Venous Embolism and Thrombosis, Ventral Hernia, Vitamin D Deficiency
Languages:
English, Spanish
Description:
Dr. Ho graduated from the Temple University School of Medicine in 1999. He works in Flagstaff, AZ and specializes in Family Medicine. Dr. Ho is affiliated with Flagstaff Medical Center.

Thomas A. Ho

Specialties:
Internal Medicine
Work:
Aspirus Medical GroupAspirus Doctors Clinic
2031 Peach St, Wisconsin Rapids, WI 54494
715-4230122 (phone) 715-4226489 (fax)
Site
Education:
Medical School
University of Minnesota Medical School at Minneapolis
Graduated: 1984
Conditions:
Acute Bronchitis, Diabetes Mellitus (DM), Hypertension (HTN), Acne, Acute Pancreatitis, Acute Sinusitis, Acute Upper Respiratory Tract Infections, Anemia, Anxiety Dissociative and Somatoform Disorders, Anxiety Phobic Disorders, Atrial Fibrillation and Atrial Flutter, Attention Deficit Disorder (ADD), Benign Paroxysmal Positional Vertigo, Benign Polyps of the Colon, Benign Prostatic Hypertrophy, Bronchial Asthma, Calculus of the Urinary System, Cardiac Arrhythmia, Carpel Tunnel Syndrome, Cataract, Cholelethiasis or Cholecystitis, Chronic Renal Disease, Constipation, Contact Dermatitis, Dementia, Disorders of Lipoid Metabolism, Erectile Dysfunction (ED), Fractures, Dislocations, Derangement, and Sprains, Gastritis and Duodenitis, Gastroesophageal Reflux Disease (GERD), Gout, Hemorrhoids, Hypothyroidism, Iron Deficiency Anemia, Irritable Bowel Syndrome (IBS), Ischemic Heart Disease, Migraine Headache, Mitral Valvular Disease, Osteoarthritis, Osteoporosis, Overweight and Obesity, Peripheral Nerve Disorders, Phlebitis and Thrombophlebitis, Prostatitis, Pulmonary Embolism, Rotator Cuff Syndrome and Allied Disorders, Skin and Subcutaneous Infections, Urinary Incontinence, Venous Embolism and Thrombosis, Vitamin D Deficiency
Languages:
Chinese, English, Spanish
Description:
Dr. Ho graduated from the University of Minnesota Medical School at Minneapolis in 1984. He works in Wisconsin Rapids, WI and specializes in Internal Medicine. Dr. Ho is affiliated with Aspirus Riverview Hospital & Clinics and Aspirus Wausau Hospital.

Thomas H. Ho

Specialties:
Anesthesiology
Work:
Garden Grove Anesthesiology Group
12601 Gdn Grv Blvd, Garden Grove, CA 92843
714-6360342 (phone) 714-6360391 (fax)
Education:
Medical School
University of California, San Francisco School of Medicine
Graduated: 2003
Languages:
Chinese, English, Korean, Spanish
Description:
Dr. Ho graduated from the University of California, San Francisco School of Medicine in 2003. He works in Garden Grove, CA and specializes in Anesthesiology.
Thomas Ho Photo 3

Thomas H Ho

Specialties:
Anesthesiology
Education:
University of California at San Francisco (2003)

Thomas Ho resumes & CV records

Resumes

Thomas Ho Photo 49

Owner

Location:
San Diego, CA
Industry:
Retail
Work:
Sfd
Owner
Education:
The University of Texas at Austin 1992 - 2001
Skills:
Web Development
Thomas Ho Photo 50

Senior Staff Firmware Engineer

Location:
San Diego, CA
Industry:
Information Technology And Services
Work:
Motorola
Senior Staff Firmware Engineer
Education:
Udacity
University of Wisconsin - Milwaukee
Masters
Skills:
Embedded Systems, Rtos, Embedded Software, Debugging, Device Drivers, Clearcase, C, Linux, Firmware, Embedded Linux, Tcp/Ip, Software Engineering, Software Development, Real Time Operating Systems, C++, Tensorflow, Ros, Python, Keras, Unix, Machine Learning
Thomas Ho Photo 51

Software Programmer

Work:

Software Programmer
Thomas Ho Photo 52

Thomas Ho

Location:
San Diego, CA
Industry:
Retail
Work:
Semper Fi Depot
Manager
Thomas Ho Photo 53

Lawyer

Location:
Cupertino, CA
Industry:
Law Practice
Thomas Ho Photo 54

Thomas Ho

Thomas Ho Photo 55

Thomas Ho

Thomas Ho Photo 56

Thomas Ho

Industry:
Hospital & Health Care

Publications & IP owners

Us Patents

Socket Calibration Method And Apparatus

US Patent:
6492797, Dec 10, 2002
Filed:
Feb 28, 2000
Appl. No.:
09/514708
Inventors:
Howard M. Maassen - San Jose CA
William A. Fritzsche - Morgan Hill CA
Thomas P. Ho - Los Altos CA
Joseph C. Helland - San Jose CA
Assignee:
Schlumberger Technologies, Inc. - San Jose CA
International Classification:
G01R 1132
US Classification:
324 74
Abstract:
A method and apparatus for calibrating tester timing accuracy during testing of integrated circuits. An ATE tester measures itself through reference blocks that have the same relevant dimensions as the integrated circuits to be tested. The number of reference blocks required is equal to the number of signal terminals on an integrated circuit to be tested being subject to timing calibration. A signal trace electrically connects a different signal terminal to a common reference terminal on each reference block. Each signal trace used should be closely matched both physically and electrically to the other signal traces used in the set of reference blocks, so that the electrical path length associated with each trace is nearly identical. To perform the timing calibration, the reference blocks may be mounted on a single fixture one at a time, or using multi-site fixtures, multiple reference blocks may be used in parallel. The fixture provides electrical connection of the reference block to the loadboard, and ultimately, the tester.

Graphics Processor With Deferred Shading

US Patent:
6597363, Jul 22, 2003
Filed:
Aug 20, 1999
Appl. No.:
09/378637
Inventors:
Richard E. Hessel - Pleasanton CA
Vaughn T. Arnold - Scotts Valley CA
Jack Benkual - Cupertino CA
Joseph P. Bratt - San Jose CA
George Cuan - Sunnyvale CA
Stephen L. Dodgen - Boulder Creek CA
Emerson S. Fang - Fremont CA
Zhaoyu Gong - Cupertino CA
Thomas Y. Ho - Fremont CA
Hengwei Hsu - Fremont CA
Sidong Li - San Jose CA
Sam Ng - Fremont CA
Matthew N. Papakipos - Menlo Park CA
Jason R. Redgrave - Mountain View CA
Sushma S. Trivedi - Sunnyvale CA
Nathan D. Tuck - San Diego CA
Assignee:
Apple Computer, Inc. - Cupertino CA
International Classification:
G06T 120
US Classification:
345506, 345545, 345563, 345653, 345654
Abstract:
Graphics processors and methods are described that encompass numerous substructures including specialized subsystems, subprocessors, devices, architectures, and corresponding procedures. Embodiments of the invention may include one or more of deferred shading, a bled frame buffer, and multiple-stage hidden surface removal processing, as well as other structures and/or procedures. Embodiments of the present invention are designed to provide high-performance 3D graphics with Phong shading, subpixel anti-aliasing, and texture- and bump-mappings.

System, Apparatus, Method, And Computer Program For Execution-Order Preserving Uncached Write Combine Operation

US Patent:
6671747, Dec 30, 2003
Filed:
Aug 3, 2000
Appl. No.:
09/632278
Inventors:
Jack Benkual - Cupertino CA
Thomas Y. Ho - Fremont CA
Assignee:
Apple Computer, Inc. - Cupertino CA
International Classification:
G06F 300
US Classification:
710 1, 710 52, 710 65, 711100, 712225
Abstract:
A mechanism that allows an application program running on a processor, to send data to a device using a medium that temporarily stores data and changes the order of the data dispatch on the way to the device. An inventive Random-In-First-Out (RIFO) buffer or memory device that restores the original order is provided. Several alternative approaches for implementing the RIFO control mechanisms for write efficiency and correctness. Method for use in conjunction with a data processing system having a host processor executing write instructions and communicating results in the form of symbols generated by the write instructions to at least one hardware device coupled to the host processor for receiving the symbols from the host processor, where the method preserves a predetermined order in which the symbols are received by the hardware device. Method includes sending a symbol from the host processor to a storage with an identifier indicating a symbol ordering relative to other of the symbols, storing the symbol and the indicator in the storage, and altering the order of dispatch of the symbols from the storage to the hardware device based on the indicator so that the symbols are received by the hardware device in the predetermined order independent of the order in which the symbols were communicated by the host processor. The invention also provides numerous embodiments of system, apparatus, method, computer program, and computer program product associated with the inventive concept.

Deferred Shading Graphics Pipeline Processor Having Advanced Features

US Patent:
6717576, Apr 6, 2004
Filed:
Aug 20, 1999
Appl. No.:
09/377503
Inventors:
Richard E. Hessel - Pleasanton CA
Vaughn T. Arnold - Scotts Valley CA
Jack Benkual - Cupertino CA
Joseph P. Bratt - San Jose CA
George Cuan - Sunnyvale CA
Stephen L. Dodgen - Boulder Creek CA
Emerson S. Fang - Fremont CA
Zhaoyu Gong - Cupertino CA
Thomas Y. Ho - Fremont CA
Hengwei Hsu - Fremont CA
Sidong Li - San Jose CA
Sam Ng - Fremont CA
Matthew N. Papakipos - Menlo Park CA
Jason R. Redgrave - Mountain View CA
Sushma S. Trivedi - Sunnyvale CA
Nathan D. Tuck - San Diego CA
Shun Wai Go - Milpitas CA
Lindy Fung - Sunnyvale CA
Tuan D. Nguyen - San Jose CA
Joseph P. Grass - Menlo Park CA
Bo Hong - San Jose CA
Abraham Mammen - Pleasanton CA
Abbas Rashid - Fremont CA
Albert Suan-Wei Tsay - Fremont CA
Assignee:
Apple Computer, Inc. - Cupertino CA
International Classification:
G06T 1500
US Classification:
345419, 345506, 345522
Abstract:
A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple-stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.

Test System And Methodology

US Patent:
6744267, Jun 1, 2004
Filed:
Jul 16, 2002
Appl. No.:
10/197134
Inventors:
Frank M. Sauk - San Ramon CA
Gary A. Wells - Fremont CA
Thomas P. Ho - Los Altos CA
Assignee:
NPTest, LLC - San Jose CA
International Classification:
G01R 3102
US Classification:
324754, 324755, 324758
Abstract:
A test system for testing an electronic device is deployable in two basic configurations. In one of the configurations, a load board ( ) that receives a unit ( ) of the device is directly attached to a test head ( ). In the other configuration, the same load board or one having largely the same pattern of test-head signal transmission positions is coupled through an interface apparatus ( ) to a test head. A probe system ( ) contacts that load board or/and the interface apparatus. The interface apparatus is normally configured to largely prevent test-head vibrations from being transferred to the probe system. Additionally or alternatively, the load board is vacuum attached to the interface apparatus.

Deferred Shading Graphics Pipeline Processor Having Advanced Features

US Patent:
7167181, Jan 23, 2007
Filed:
Jun 9, 2003
Appl. No.:
10/458493
Inventors:
Richard E. Hessel - Pleasanton CA, US
Vaughn T. Arnold - Scotts Valley CA, US
Jack Benkual - Cupertino CA, US
Joseph P. Bratt - San Jose CA, US
George Cuan - Sunnyvale CA, US
Stephen L. Dodgen - Boulder Creek CA, US
Emerson S. Fang - Fremont CA, US
Zhaoyu Gong - Cupertino CA, US
Thomas Y. Ho - Fremont CA, US
Hengwei Hsu - Fremont CA, US
Sidong Li - San Jose CA, US
Sam Ng - Fremont CA, US
Matthew N. Papakipos - Menlo Park CA, US
Jason R. Redgrave - Mountain View CA, US
Sushma S. Trivedi - Sunnyvale CA, US
Nathan D. Tuck - San Diego CA, US
Shun Wai Go - Milpitas CA, US
Lindy Fung - Sunnyvale CA, US
Tuan D. Nguyen - San Jose CA, US
Joseph P. Grass - Menlo Park CA, US
Bo Hong - San Jose CA, US
Abraham Mammen - Pleasanton CA, US
Abbas Rashid - Fremont CA, US
Albert Suan-Wei Tsay - Fremont CA, US
Assignee:
Apple Computer, Inc. - Cupertino CA
International Classification:
G06T 1/20
G06T 15/40
G09G 5/00
US Classification:
345506, 345421, 345613, 345614
Abstract:
A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.

Method And Apparatus For Measuring Die-Level Integrated Circuit Power Variations

US Patent:
7436196, Oct 14, 2008
Filed:
Feb 15, 2006
Appl. No.:
11/354721
Inventors:
William C. Athas - San Jose CA, US
Herbert Lopez-Aguado - Sunnyvale CA, US
Thomas Y. Ho - Fremont CA, US
Assignee:
Apple Inc. - Cupertino CA
International Classification:
G01R 31/02
US Classification:
324763
Abstract:
A system that determines power consumption on an IC chip. The system includes a test structure located within the IC chip variations which includes one or more gates which receives power from a power source, wherein each gate has a different drive strength, and wherein the output of each gate is coupled to a load through a corresponding switch. The system also includes a current-measuring mechanism coupled to the power supply which measures the current consumed by the gates. When a specific switch is activated, the output of a corresponding gate is coupled to the load, thereby causing the corresponding gate to drive the load. The current consumed by the corresponding gate is measured by the current measuring mechanism. The measured current can be used to determine the power consumption of the corresponding gate driving the load.

Deferred Shading Graphics Pipeline Processor Having Advanced Features

US Patent:
2007016, Jul 19, 2007
Filed:
Dec 19, 2006
Appl. No.:
11/613093
Inventors:
Jerome Duluk - Palo Alto CA, US
Richard Hessel - Pleasanton CA, US
Vaughn Arnold - Scotts Valley CA, US
Jack Benkual - Cupertino CA, US
Joseph Bratt - San Jose CA, US
George Cuan - Sunnyvale CA, US
Stephen Dodgen - Boulder Creek CA, US
Emerson Fang - Fremont CA, US
Zhaoyu Gong - Cupertino CA, US
Thomas Ho - Fremont CA, US
Hengwei Hsu - Fremont CA, US
Sidong Li - San Jose CA, US
Sam Ng - Fremont CA, US
Matthew Papakipos - Menlo Park CA, US
Jason Redgrave - Mountain View CA, US
Sushma Trivedi - Sunnyvale CA, US
Nathan Tuck - San Diego CA, US
Shun Go - Milpitas CA, US
Lindy Fung - Sunnyvale CA, US
Tuan Nguyen - San Jose CA, US
Joseph Grass - Menlo Park CA, US
Bo Hung - San Jose CA, US
Abraham Mammen - Pleasanton CA, US
Abbas Rashid - Fremont CA, US
Albert Tsay - Fremont CA, US
Assignee:
Apple Computer, Inc. - Cupertino CA
International Classification:
G06T 1/20
US Classification:
345506000
Abstract:
A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.

Isbn (Books And Publications)

Financial Modeling For Financial Institutions

Author:
Thomas A. Ho
ISBN #:
0195172582

Financial Modeling For Financial Institutions

Author:
Thomas A. Ho
ISBN #:
0195172590

Financial Modeling For Options, Futures, And Derivatives

Author:
Thomas A. Ho
ISBN #:
0195172604

Financial Modeling For Options, Futures, And Derivatives

Author:
Thomas A. Ho
ISBN #:
0195172612

Securities Valuation: Applications Of Financial Modeling

Author:
Thomas A. Ho
ISBN #:
0195172744

Securities Valuation: Applications Of Financial Modeling

Author:
Thomas A. Ho
ISBN #:
0195172752

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