Troy L Harrell, 39Daly City, CA

4710893, Dec 1, 1987

Jun 22, 1984

6/623381

Samuel McCutcheon - Saratoga CA
Jeffrey Lum - Fremont CA
Roman Solek - Mountain View CA
Troy Harrell - Sunnyvale CA
Robert Leman - San Jose CA

Autek Systems Corporation - Santa Clara CA

G06F 1300

364900

A high speed bus structure and data transfer method to provide data transfer capability between a central processing device and a plurality of electrical modules coupled to the bus. In the preferred embodiment, a central processing unit is coupled to a plurality of electrical modules for data reception and transmission. In a module "listen" cycle, the central processor (CP) device generates a function code which is transmitted on a command bus coupled to each electrical module. The CP device asserts data required by the particular module function on the data bus coupled to each electrical module. The CP device transmits an enable signal (ES) on an enable bus to enable the particular electrical module which is to receive data and asserts a clock signal on a clock line coupled to each module. The enabled electrical module receives valid data from the CP device upon sensing a deasserted clock line denoting the end of a clock cycle. In a module "talk" cycle, an enabled electrical module transmits data to the CP device after transmitting a service request (SRQ) signal to the awaiting CP device which has previously requested a data transmission.