Uday Dasari resumes & CV records
Resumes
Uday Kumar Dasari
Uday Dasari
Uday Kumar Dasari, 39San Jose, CA
Uday Dasari Phones & Addresses
San Jose, CA
Round Rock, TX
Fremont, CA
Hayward, CA
Rocklin, CA
Santa Clara, CA
Long Beach, CA
Mentions for Uday Kumar Dasari
Publications & IP owners
Us Patents
Hardware Circuit For Accelerating Neural Network Computations
US Patent:
2021032, Oct 21, 2021
Filed:
Dec 19, 2019
Appl. No.:
16/973087
Inventors:
- Mountain View CA, US
Dong Hyuk Woo - San Jose CA, US
Suyog Gupta - SUNNYVALE CA, US
Uday Kumar Dasari - Union City CA, US
Dong Hyuk Woo - San Jose CA, US
Suyog Gupta - SUNNYVALE CA, US
Uday Kumar Dasari - Union City CA, US
International Classification:
G06N 3/063
G06N 3/04
G06N 3/04
Abstract:
Methods, systems, and apparatus, including computer-readable media, are described for a hardware circuit configured to implement a neural network. The circuit includes multiple super tiles. Each super tile includes a unified memory for storing inputs to a neural network layer and weights for the layer. Each super tile includes multiple compute tiles. Each compute tile executes a compute thread that is used to perform the computations to generate an output for the neural network layer. Each super tile includes arbitration logic coupled to the unified memory and each compute tile. The arbitration logic is configured to: pass inputs stored in the unified memory to the compute tiles; pass weights stored in the unified memory to the compute tiles; and pass, to the unified memory, the output generated for the layer based on computations performed at the compute tiles using the inputs and the weights for the layer.
Neural Network Accelerator Tile Architecture With Three-Dimensional Stacking
US Patent:
2018036, Dec 20, 2018
Filed:
Mar 21, 2018
Appl. No.:
15/927367
Inventors:
- Mountain View CA, US
Olivier Temam - Antony, FR
Ravi Narayanaswami - San Jose CA, US
Uday Kumar Dasari - Union City CA, US
Olivier Temam - Antony, FR
Ravi Narayanaswami - San Jose CA, US
Uday Kumar Dasari - Union City CA, US
International Classification:
G06N 3/04
H04B 1/16
H04B 1/16
Abstract:
A three dimensional neural network accelerator that includes a first neural network accelerator tile that includes a first transmission coil, and a second neural network accelerator tile that includes a second transmission coil, wherein the first neural network accelerator tile is adjacent to and aligned vertically with the second neural network accelerator tile, and wherein the first transmission coil is configured to wirelessly communicate with the second transmission coil via inductive coupling.
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