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Walter A Davis Deceased4405 Bordeaux Dr, Oakley, CA 94561

Known as:
Walter Roberta Davis Waltera Davis
Related to:
Avis D Richard 56 Sherri Davis

Walter Davis Phones & Addresses

Oakley, CA   

Hemet, CA   

500 E Sunset Ridge Rd, Union, WA 98592    510-6569228   

Pleasanton, CA   

Fremont, CA   

Manson, WA   

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Mentions for Walter A Davis

Career records & work history

Lawyers & Attorneys

Walter Davis Photo 1

Walter Russell Davis, Menlo Park CA - Lawyer

Address:
530 Oak Grove Ave #205, Menlo Park, CA 94025
650-3232529 (Office)
Licenses:
California - Active 1985
Education:
University of Texas
University of Texas School of Law
Specialties:
Business - 25%
Employment / Labor - 25%
Real Estate - 25%
Litigation - 25%
Walter Davis Photo 2

Walter Lee Davis, Oakland CA - Lawyer

Address:
Walter L. Davis
1999 Harrison St., Suite 1350, Oakland, CA 94612
510-5887543 (Office)
Licenses:
California - Active 1981
Experience:
Trial atty at San Francisco City Attorney's Office - 1981-1986
Education:
U of San Francisco SOL
Pitzer Coll
Specialties:
Litigation - 100%
Associations:
Alameda-Contra Costa Trial Lawyers Association - Former Board of Directors
Walter Davis Photo 3

Walter Davis - Lawyer

Specialties:
Corporate Law, Business Law
ISLN:
907977696
Admitted:
1989
University:
Bemidji State University, B.A., 1967
Law School:
William Mitchell College of Law, J.D., 1988
Walter Davis Photo 4

Walter L. Davis, Hayward CA - Lawyer

Office:
Walter L. Davis
Plaza Center, 22320 Foothill Blvd., Ste. 600, Hayward, CA
Specialties:
Torts, Civil Rights, Medical Malpractice, Housing Law, Civil Litigation
ISLN:
907977689
Admitted:
1981
University:
Pitzer College, B.A.
Law School:
University of San Francisco, J.D.
Walter Davis Photo 5

Walter Russell Davis, Menlo Park CA - Lawyer

Address:
530 Oak Grove Ave, Menlo Park, CA 94025
Phone:
650-3232529 (Phone), 650-3232526 (Fax)
Experience:
40 years
Specialties:
Real Estate Law
Jurisdiction:
California (1985)
Law School:
Univ of Texas School of Law
Education:
Univ of Texas, Undergraduate Degree
Univ of Texas School of Law, Law Degree
Memberships:
California State Bar (1985)

License Records

Walter L Davis

Licenses:
License #: E-1324 - Expired
Category: Engineering Intern

Walter Davis resumes & CV records

Resumes

Walter Davis Photo 34

Walter Davis

Work:
AVI BioPharma - Department of Defense (DOD) / ALIPRO USA, LLC - Bothell, WA May 2011 to Jun 2011
PM Integration Master Scheduler (IMS)/Planner (IMP) Computing Systems and Software Feb 2010 to Feb 2011 Engineering Development Models Jan 2010 to Jan 2011 Fermi National Accelerator Laboratory (Fermilab) - DOE / URS Corp - Batavia, IL Jul 2009 to Jun 2010
PMO Integration Master Planner (IMP)/Scheduler (IMS) The Boeing Co - Bingen, WA 2010 to Jan 2010 United States Marine Corps Sep 2008 to Oct 2008
Sr. Project Planner and Project Controls Flight Structures, Inc - Marysville, WA Apr 2007 to Jul 2008
Engineering (PMO) Integration Master Planner FDA Phase 2003 to 2003 FDA Phase 2001 to 2001
Education:
Evergreen Valley College - Houston, TX 2004
Programing and Business Administration Stanford University Linear Accelerator Laboratory - Cupertino, CA 1997 Foothill College - Los Altos, CA
Master in o Material Requirements Planning

Publications & IP owners

Wikipedia

Walter Davis Photo 43

Walter Davis (Basketball)

Walter Paul Davis (born September 9, 1954, in Pineville, North Carolina) is a retired American basketball player. A 6'6" forward/guard, Davis spent 15 years in ...
Walter Davis Photo 44

Walter Davis

Walter Davis may refer to: [edit] Sports. Walter Davis (rugby) an Australian rugby union player; Walter Davis (footballer) (18881937), Millwall F.C. and Wales ...

Us Patents

Adjustable Pre-Load Screw And Nut Assembly

US Patent:
5252015, Oct 12, 1993
Filed:
Nov 4, 1991
Appl. No.:
7/787119
Inventors:
Walter S. Davis - San Jose CA
International Classification:
F16B 3912
US Classification:
411231
Abstract:
An adjustable pre-load screw and nut assembly is described including a screw with external helical threads and a nut having two separate portions each with internal threads complementary to those on the screw. An adjustment nut and adjacent O-ring can be turned an amount sufficient to interengage the nut portions to urge them apart and thus establish contact with opposing surfaces of the screw threads to effect pre-loaded contact therewith to eliminate backlash when the screw is turned in either direction.

Pulse Width Modulator Circuit For Switching Regulators

US Patent:
4634892, Jan 6, 1987
Filed:
Jan 16, 1984
Appl. No.:
6/571274
Inventors:
Tim D. Isbell - San Jose CA
Walter R. Davis - Sunnyvale CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03K 3017
H03K 504
H03K 700
US Classification:
307265
Abstract:
A circuit is shown for pulse width modulating the output of a voltage controlled oscillator without introducing any oscillator frequency or amplitude (slope) modulation. A summing circuit is combined with a comparator and provided with inputs that accommodate differential sum/difference inputs, an error input and a ramp input from the oscillator or other source. The ramp and error signals are combined differentially to pulse width modulate the comparator output and pulse width modulation can also be achieved via the sum/difference inputs in a differential relationship.

Totem Pole Output Circuit With Reduced Current Spikes

US Patent:
4603268, Jul 29, 1986
Filed:
Dec 14, 1983
Appl. No.:
6/561405
Inventors:
Walter R. Davis - Sunnyvale CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03K 508
H03K 512
US Classification:
307559
Abstract:
A totem pole output stage is shown where current spikes are minimized. The circuit disclosed employs four transistors and three diodes to eliminate the spikes associated with the input low to high transition. A fourth diode minimizes the input high to low transition time.

Pulse Width Modulator Circuit For Switching Regulators

US Patent:
4743783, May 10, 1988
Filed:
Aug 25, 1986
Appl. No.:
7/001321
Inventors:
Tim D. Isbell - San Jose CA
Walter R. Davis - Sunnyvale CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03K 522
H03B 1900
H03F 345
US Classification:
307498
Abstract:
A circuit for pulse width modulating the output of a voltage controlled oscillator without introducing any ocillator frequency or amplitude (slope) modulation. A summing circuit is combined with a comparator and provided with inputs that accommodate differential sum/difference inputs, an error input and a ramp input from the oscillator or other source. The ramp and error signals are combined differentially to pulse width modulate the comparator output and pulse width modulation can also be achieved by via the sum/difference inputs a differential relationship.

Bistate Linear Amplifier Circuit

US Patent:
4527128, Jul 2, 1985
Filed:
Sep 6, 1983
Appl. No.:
6/529430
Inventors:
Harry J. Bittner - Santa Clara CA
Daniel D. Culmer - Santa Clara CA
Walter R. Davis - Sunnyvale CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03F 102
US Classification:
330 9
Abstract:
A linear amplifier output stage is provided with unity gain buffer means having an input coupled to the output terminal and an output coupled to the stage input. The unity gain buffer means is normally turned off by a control signal. When the amplifier is disabled by switching its bias current off, the buffers are turned on so that the output stage input capacitance is charged or discharged via the buffer means in accordance with the output terminal signal. When a plurality of such amplifiers are commonly coupled to a signal line the off amplifiers cannot be driven into conduction by the operating amplifier's output signal.

Switching Regulator Off-Line Starting Circuit

US Patent:
4497017, Jan 29, 1985
Filed:
May 16, 1983
Appl. No.:
6/495201
Inventors:
Walter R. Davis - Sunnyvale CA
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H02P 100
US Classification:
363 49
Abstract:
A switching regulator is provided with a separate or isolated d-c output for operating the switching pulse generating circuits. A large value resistor coupled between the d-c input line and the isolated d-c output will charge the filter capacitor to a higher than normal voltage. A zener diode string is coupled across the filter capacitor. The zener diodes in combination have a higher than nominal zener voltage. The diodes will respond to the capacitor voltage and develop a starting pulse that initiates the power supply when it is first energized.

Possible Relatives

Cynthia O Davis  David R Davis  A Davis  D R Davis  Davina L Davis  Davon L Davis  Davonne Davis  Walter J Last  Walter C Johnson  Walter J Stancil 

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