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Xi I Li, 45205 Snow Goose Dr, Middletown, DE 19709

Xi Li Phones & Addresses

205 Snow Goose Dr, Middletown, DE 19709   

Trumbull, CT   

Stratford, CT   

Philadelphia, PA   

Sandy Hook, CT   

Newark, DE   

Dover, DE   

Storrs Mansfield, CT   

Salisbury, MD   

Somers, CT   

Tolland, CT   

Work

Company: Shanghai pariguard accessories co., ltd Dec 2014 Position: Marketing assistant

Education

School / High School: State University of New York at Stony Brook- Stony Brook, NY Aug 2013 Specialities: M.S. in Chemistry

Mentions for Xi I Li

Career records & work history

Lawyers & Attorneys

Xi Li Photo 1

Xi Li

Medicine Doctors

Xi Li Photo 2

Xi Susan Li

Specialties:
Internal Medicine
Therapeutic Radiologic Physics
Education:
University of Washington (2002)

License Records

Xi Li

Licenses:
License #: 1201110121
Category: Cosmetologist License

Xi Li

Licenses:
License #: 26863 - Active
Issued Date: Sep 25, 2009
Expiration Date: Jun 30, 2017
Type: Certified Public Accountant

Xi Li resumes & CV records

Resumes

Xi Li Photo 29

Xi Li

Xi Li Photo 30

Xi Li - Stony Brook, NY

Work:
Shanghai Pariguard Accessories Co., Ltd Dec 2014 to Jan 2015
Marketing Assistant
Prof. Robert Barney Grubbs's Polymer Laboratory, State University of New York at Stony Brook - New York, NY Apr 2014 to Dec 2014
Graduate Laboratory Assistant
Summer Tutor - Hefei, Anhui Province, China Jul 2013 to Aug 2013
Math Tutor
Prof. Liying Lu's Nanomaterials Laboratory, University of Science and Technology Beijing Feb 2013 to Jun 2013
Undergraduate Laboratory Assistant
Prof. Jian Xu's Biochemistry Laboratory, Institute of Process Engneering Aug 2012 to Jan 2013
Undergraduate Laboratory Research Assistant
Prof. Yongfu Xu's Photochemistry Laboratory, Institute of Atmospheric Physics Jul 2012 to Aug 2012
Undergraduate Laboratory Assistant
Prof. Ye Li's Inorganic Chemistry Laboratory, University of Science and Technology Beijing Apr 2011 to Apr 2012
Undergraduate Laboratory Assistant
Education:
State University of New York at Stony Brook - Stony Brook, NY Aug 2013
M.S. in Chemistry
University of Science and Technology Beijing Aug 2009 to May 2013
B.S. in Chemistry
Xi Li Photo 31

Xi Li

Location:
United States

Publications & IP owners

Us Patents

Post Sti Trench Capacitor

US Patent:
7682922, Mar 23, 2010
Filed:
Jan 18, 2007
Appl. No.:
11/624385
Inventors:
Anil K. Chinthakindi - Hay Market VA, US
Xi Li - Somers NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/20
US Classification:
438386, 438389, 438391, 438392
Abstract:
A capacitor having a suitably large value for decoupling applications is formed in a trench defined by isolation structures such as recessed isolation or shallow trench isolation. The capacitor provides a contact area coextensive with an active area and can be reliably formed individually or in small numbers. Plate contacts are preferably made through implanted regions extending to or between dopant diffused regions forming a capacitor plate. The capacitor can be formed by a process subsequent to formation of isolation structures such that preferred soft mask processes can be used to form the isolation structures and process commonality and compatibility constraint are avoided while the capacitor forming processes can be performed in common with processing for other structures.

Trench Memory With Self-Aligned Strap Formed By Self-Limiting Process

US Patent:
7749835, Jul 6, 2010
Filed:
Mar 14, 2008
Appl. No.:
12/048263
Inventors:
Xi Li - Somers NY, US
Kangguo Cheng - Guiderland NY, US
Johnathan Faltermeier - Delanson NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/84
H01L 21/8242
US Classification:
438243, 438386, 438430, 438739, 257E21561
Abstract:
A semiconductor structure is described. The structure includes a trench opening formed in a semiconductor substrate having a semiconductor-on-insulator (SOI) layer and a buried insulating (BOX) layer; and a filling material formed in the trench opening, the filling material forming a “V” shape within the trench memory cell, wherein the “V” shape includes a top portion substantially adjacent to a top surface of the BOX layer. A method of fabricating the semiconductor structure is also described. The method includes forming a trench opening in a semiconductor substrate having an SOI layer and a BOX layer; laterally etching the BOX layer such that a portion of the trench opening associated with the BOX layer is substantially greater than a portion of the trench opening associated with the SOI layer; filling the trench opening with a filling material; and recessing the filling material.

Trench Memory With Self-Aligned Strap Formed By Self-Limiting Process

US Patent:
7893480, Feb 22, 2011
Filed:
Jan 4, 2010
Appl. No.:
12/651608
Inventors:
Xi Li - Somers NY, US
Kangguo Cheng - Guiderland NY, US
Johnathan Faltermeier - Delanson NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 29/94
H01L 27/108
US Classification:
257301, 257304, 257350, 257E29346
Abstract:
A semiconductor structure is described. The structure includes a trench opening formed in a semiconductor substrate having a semiconductor-on-insulator (SOI) layer and a buried insulating (BOX) layer; and a filling material formed in the trench opening, the filling material forming a “V” shape within the trench memory cell, wherein the “V” shape includes a top portion substantially adjacent to a top surface of the BOX layer. A method of fabricating the semiconductor structure is also described. The method includes forming a trench opening in a semiconductor substrate having an SOI layer and a BOX layer; laterally etching the BOX layer such that a portion of the trench opening associated with the BOX layer is substantially greater than a portion of the trench opening associated with the SOI layer; filling the trench opening with a filling material; and recessing the filling material.

Bottle-Shaped Trench Capacitor With Enhanced Capacitance

US Patent:
8021945, Sep 20, 2011
Filed:
Apr 14, 2009
Appl. No.:
12/423242
Inventors:
Xi Li - Somers NY, US
Russell H. Arndt - Fishkill NY, US
Kangguo Cheng - Guilderland NY, US
Richard O. Henry - Newburgh NY, US
Jinghong H. Li - Poughquag NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/8242
US Classification:
438243, 438386, 438964
Abstract:
In accordance with an aspect of the invention, a method is provided for fabricating a semiconductor chip including a trench capacitor. In such method, a monocrystalline semiconductor region can be etched in a vertical direction through an opening in a dielectric layer to form a trench exposing a rough surface of monocrystalline semiconductor material. The trench has an initial lateral dimension in a first direction transverse to the vertical direction. The semiconductor material exposed at the surface of the trench then is etched in a crystallographic orientation-dependent manner to expose a multiplicity of crystal facets of the semiconductor material at the trench surface. A dopant-containing liner may then be deposited to line the surface of the trench and a temperature of the substrate then be elevated to drive a dopant from the dopant-containing liner into the semiconductor region adjacent to the surface. During such step, typically a portion of the semiconductor material exposed at the wall is oxidized. At least some of the oxidized portion is removed to expose a wall of an enlarged trench, along which wall a dielectric layer and conductive material are formed in order to form a trench capacitor.

Method Of Forming Asymmetric Spacers And Methods Of Fabricating Semiconductor Device Using Asymmetric Spacers

US Patent:
2014026, Sep 18, 2014
Filed:
Jun 3, 2014
Appl. No.:
14/294557
Inventors:
- Armonk NY, US
Xi Li - Somers NY, US
Richard S. Wise - Newburgh NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
H01L 21/67
US Classification:
15634539
Abstract:
A method of fabricating asymmetrical spacers, structures fabricated using asymmetrical spacers and an apparatus for fabricating asymmetrical spacers. The method includes: forming on a substrate, a structure having a top surface and opposite first and second sidewalls and having a longitudinal axis parallel to the sidewalls; forming a conformal layer on the top surface of the substrate, the top surface of the structure and the sidewalls of the structure; tilting the substrate about a longitudinal axis relative to a flux of reactive ions, the flux of reactive ions striking the conformal layer at acute angle; and exposing the conformal layer to the flux of reactive ions until the conformal layer is removed from the top surface of the structure and the top surface of the substrate leaving a first spacer on the first sidewall and a second spacer on the second sidewall, the first spacer thinner than the second spacer.

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