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Xiao Zhao, 47Pleasanton, CA

Xiao Zhao Phones & Addresses

Pleasanton, CA   

San Francisco, CA   

Fremont, CA   

Milpitas, CA   

5624 Pier Dr, Rockville, MD 20851    301-4681356   

733 Monroe St, Rockville, MD 20850    301-7620821   

San Jose, CA   

Fairfax, VA   

Mentions for Xiao Zhao

Resumes & CV records

Resumes

Xiao Zhao Photo 37

Product Design Engineer, Iphone

Location:
San Francisco, CA
Industry:
Mechanical Or Industrial Engineering
Work:
Apple
Product Design Engineer, Iphone
Stanford University Sep 2010 - Jun 2013
Residential Staff: Tutor
Ford Motor Company Jun 2012 - Sep 2012
Automatic Transmission Cad and Cae Intern
Foxconn Jun 2011 - Sep 2011
Research and Development Intern
Army High Performance Computing Research Center Stanford University Jun 2010 - Aug 2010
Researcher and Analyst
Peddie Summer School Jun 2009 - Aug 2009
Student Teacher and Administrative Assistant
Learning Ally Jul 2008 - Aug 2008
Productions Assistant
Education:
Stanford University 2009 - 2013
Master of Science, Masters, Bachelors, Bachelor of Science, Mechanical Engineering
Skills:
Matlab, Numerical Analysis, Engineering, Ansys, Finite Element Analysis, Machining, Solidworks, Pro Engineer, Abaqus, Autocad, Modeling, Robotics, Labview, Lathe, C++
Xiao Zhao Photo 38

General Manager

Location:
5541 Paseo Navarro, Pleasanton, CA 94566
Industry:
Education Management
Work:
Thecoderschool
General Manager
Gcl New Energy Holdings Ltd. Mar 2016 - Jul 2018
Director of O and M
Gcl Solar Energy, Inc. Nov 2014 - Jun 2015
Project Manager
Ensenda 2010 - May 2011
Senior Software Engineer
Bebo Mar 2009 - Jan 2010
Senior Software Engineer
Current Tv Feb 2008 - Feb 2009
Software Engineer
Hi5 Networks Jul 2005 - Dec 2007
Software Engineer
Cpdr National Database Aug 2002 - Dec 2004
Program Analyst Ii
George Washington University Aug 2001 - Apr 2002
Research Assistant
Education:
Ami Montessorie Teacher's Training Center (Mountainview Ca) 2013 - 2014
The George Washington University 2000 - 2002
Master of Science, Masters, Computer Science
Beihang University 1995 - 1999
Bachelors, Bachelor of Science, Computer Science
Skills:
Rest, Web Applications, Java, Ajax, Javascript, Distributed Systems, Postgresql, Ant, Jsp
Languages:
English
Xiao Zhao Photo 39

Xiao Yan Kelly Zhao

Location:
San Francisco, CA
Industry:
Primary/Secondary Education
Work:
Bob Chinese & English Education School Jul 2018 - Aug 2018
English Teacher
World Savvy Jan 2018 - May 2018
Global Education Curriculum Fellow
Wedu Global Sep 2017 - Dec 2017
Leadership Department Intern
Nie May 2016 - Jul 2016
Research Assistant
Lectrify Jun 2015 - Aug 2015
Intern
Agi Capital Group Jun 2013 - Aug 2013
Human Resources Department Intern
Fort Mason Center For Arts & Culture Jun 2013 - Jul 2013
Events Department Intern
San Francisco Public Library Jun 2012 - Aug 2012
Intern
The Young People's Project, Inc Sep 2011 - May 2012
Math Literacy Tutor
Skills:
Research, Community Service, Higher Education, Tutoring, Microsoft Office, Editing, Powerpoint, Community Outreach, Event Planning, Nonprofits, Community Engagement, Data Entry, Filing, Translation, Intercultural Communication
Xiao Zhao Photo 40

Xiao Ning Zhao

Xiao Zhao Photo 41

Xiao Rong Zhao

Xiao Zhao Photo 42

Xiao Zhao

Location:
United States
Xiao Zhao Photo 43

Xiao Zhao

Location:
San Francisco Bay Area
Industry:
Computer Software
Xiao Zhao Photo 44

Xiao Zhao

Location:
United States

Publications & IP owners

Us Patents

Staggered Software Synchronization

US Patent:
2023008, Mar 16, 2023
Filed:
Aug 15, 2022
Appl. No.:
17/888082
Inventors:
- Santa Clara CA, US
Donghan Ryu - Los Gatos CA, US
Michael Gold - Santa Clara CA, US
Samuel Reed Koser - Santa Clara CA, US
Xiao Bo Zhao Zhang - San Jose CA, US
International Classification:
G06F 9/52
Abstract:
Approaches in accordance with various embodiments can reduce scheduling delays due to concurrent processing requests, as may involve VSyncs in multi-streaming systems. The software synchronization signals can be staggered relative to each other by offsetting an initial synchronization signal. These software synchronization signals can be readjusted over time such that each synchronization signal maintains the same relative offset, as may be with respect to other applications or containers.

Staggered Software Synchronization

US Patent:
2021024, Aug 5, 2021
Filed:
Nov 5, 2020
Appl. No.:
17/089978
Inventors:
- Santa Clara CA, US
Donghan Ryu - Los Gatos CA, US
Michael Gold - Santa Clara CA, US
Samuel Reed Koser - Santa Clara CA, US
Xiao Bo Zhao Zhang - San Jose CA, US
International Classification:
G06F 9/52
Abstract:
Approaches in accordance with various embodiments can reduce scheduling delays due to concurrent processing requests, as may involve VSyncs in multi-streaming systems. The software synchronization signals can be staggered relative to each other by offsetting an initial synchronization signal. These software synchronization signals can be readjusted over time such that each synchronization signal maintains the same relative offset, as may be with respect to other applications or containers.

Handheld Electronic Device

US Patent:
2021016, Jun 3, 2021
Filed:
Oct 12, 2020
Appl. No.:
17/068596
Inventors:
- Cupertino CA, US
Xiao Ying Zhao - Santa Clara CA, US
Luman Zhang - Sunnyvale CA, US
Christopher R. Xydis - San Francisco CA, US
Michael Firka - Santa Clara CA, US
Benjamin J. Kallman - Emerald Hills CA, US
Ihtesham H. Chowdhury - Sunnyvale CA, US
Matthew D. Hill - Santa Clara CA, US
Hugh J. Jay - Cupertino CA, US
Trent Canales - Cupertino CA, US
Lucy E. Browning - San Francisco CA, US
International Classification:
H04M 1/02
H05K 5/00
H05K 5/02
Abstract:
A portable electronic device includes a front cover, a rear cover, and a housing structure between and coupled to the front cover and the rear cover. The housing structure includes a first housing member defining and a first interlock feature formed along a first end surface. The portable electronic device also includes a second housing member defining a second interlock feature formed along a second end surface. The portable electronic device also includes a nonconductive joining element engaged with the first interlock feature and the second interlock feature, thereby structurally coupling the first housing member to the second housing member.

Handheld Electronic Device

US Patent:
2021016, Jun 3, 2021
Filed:
Oct 12, 2020
Appl. No.:
17/068432
Inventors:
- Cupertino CA, US
Eric W. Bates - San Jose CA, US
Lucy E. Browning - San Francisco CA, US
Kodiak Burke - Cupertino CA, US
Benjamin S. Bustle - Cupertino CA, US
Trent Canales - Cupertino CA, US
Tyler B. Cater - San Jose CA, US
Sawyer I. Cohen - Menlo Park CA, US
Richard Hung Minh Dinh - Cupertino CA, US
Michael Firka - Santa Clara CA, US
Kevin M. Froese - San Francisco CA, US
Jun Sik Ham - Mountain View CA, US
Matthew D. Hill - Santa Clara CA, US
Hugh J. Jay - Cupertino CA, US
Benjamin J. Kallman - Emerald Hills CA, US
Paul U. Leutheuser - San Francisco CA, US
Matthew W. Miller - Cupertino CA, US
Michael K. Mondry - San Francisco CA, US
Donald J. Parr - Mountain View CA, US
Benjamin J. Pope - Mountain View CA, US
Matthew P. Rao - San Francisco CA, US
Griffin Schmitt - San Francisco CA, US
Allegra Shum - Menlo Park CA, US
Christopher R. Xydis - San Francisco CA, US
Luman Zhang - Sunnyvale CA, US
Yaocheng Zhang - Cupertino CA, US
Zhipeng Zhang - Santa Clara CA, US
Xiao Ying Zhao - Santa Clara CA, US
International Classification:
H04M 1/02
H05K 5/00
Abstract:
A portable electronic device includes a housing member defining a first portion of an exterior front surface of the portable electronic device, a first portion of an exterior rear surface of the portable electronic device, at least a portion of an exterior side surface of the portable electronic device, a recess along an interior side of the housing member, and a ledge feature along the interior side of the housing member. The device also includes a top module coupled to the housing member and including a front cover defining a second portion of the exterior front surface of the portable electronic device, a display stack attached to the front cover, and a frame member extending at least partially around a periphery of the display stack and set apart from a surface of the recess by a gap.

Accelerated Data Transfer For Latency Reduction And Real-Time Processing

US Patent:
2019014, May 16, 2019
Filed:
Oct 24, 2018
Appl. No.:
16/169837
Inventors:
- Santa Clara CA, US
Xiao Bo Zhao - San Jose CA, US
International Classification:
G10L 15/28
G10L 15/22
G10L 15/06
G10L 15/08
Abstract:
Systems and methods relying on recognition of a pattern in a data stream, such as detecting a hotword in an audio data stream are sensitive to latency (e.g., response time). To reduce power consumption, a low power processor may be used in combination with a higher power speech recognition device. When the hotword is detected by the low power signal processor, the primary speech recognition device is signaled to wake up and begin emptying a buffer storing the hotword and subsequent audio data. Latency is the delay incurred to recognize the hotword and begin emptying the buffer. To catch-up and reduce the latency, the buffer is drained at a faster rate than the buffer is filled until a latency reduction trigger is received. The latency reduction trigger is generated when the latency has been reduced to a predetermined level.

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