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Muhammad Arif Samad, 62152 Owl Ct, Fremont, CA 94539

Muhammad Samad Phones & Addresses

152 Owl Ct, Fremont, CA 94539    510-3004100   

Scottsdale, AZ   

Santa Clara, CA   

Mountain View, CA   

San Jose, CA   

152 Owl Ct, Fremont, CA 94539   

Work

Company: Pelltechnology, inc

Education

School / High School: Punjab University- Lahore 2001 Specialities: Master of Computer Sciences in Software Engineering

Mentions for Muhammad Arif Samad

Muhammad Samad resumes & CV records

Resumes

Muhammad Samad Photo 27

Muhammad Abdul Samad

Work:
Prism Enterprises
Accountant
Abdul Razzak Associates
Assistant Finance Manager
Education:
Karachi University
Bachelor of Commerce, Bachelors
Aligarh Institute of Technology
World Academy School
Skills:
Writing, Stone, Version 7, Corian, Sales, Star, Facts, Education, English, Window, Finance, Prism, Microsoft Word, Work Ethic, Dynamic Environment, Domicile, Microsoft Excel, Pakistan, Windows Xp, Organizational Structure, Project, Management, House, Design, Science, Microsoft, Technical Qualifications, Urdu, Lotus, Computer Proficiency, Dubai
Muhammad Samad Photo 28

Muhammad Samad

Muhammad Samad Photo 29

Muhammad Samad

Muhammad Samad Photo 30

Muhammad Rafi Samad

Muhammad Samad Photo 31

Muhammad Samad

Work:
Pelltechnology, Inc 2007 to Jul 2012 laptopteks.com 2011 to 2011 NewTech Solutions - Lahore 2004 to 2007
Manager / Technical Fellow
RentACoder 1999 to 2004
Freelancer Developer
RentACoder - Lahore Jul 2001 to Sep 2001
Assistant Tutor
Education:
Punjab University - Lahore 2001 to 2003
Master of Computer Sciences in Software Engineering
The Punjab University - Lahore 1999 to 2001
Master of Mathematics
University of Engineering & Technology Lahore - Lahore Sep 1999
M.Sc. in Mathematics
Govt. F.C. College - Lahore 1997 to 1999
B.Sc. in Math A-course, Math B-course, Statistics

Publications & IP owners

Us Patents

Method For Automatic Isolation Of Functional Blocks Within Integrated Circuits

US Patent:
5392297, Feb 21, 1995
Filed:
Jun 5, 1992
Appl. No.:
7/893629
Inventors:
Martin J. Bell - Santa Clara CA
Muhammad A. Samad - San Jose CA
Assignee:
VLSI Technology, Inc. - San Jose CA
International Classification:
G01R 3128
US Classification:
371 226
Abstract:
A system for generating configurations for isolation circuits that can be designed into ASIC chips such that the isolation circuits are transparent during normal operation of the host chip but allow the embedded functional blocks to be readily isolated and accessed for testing via the host chip's pads.

Method Of Generating Tests For A Combinational Logic Circuit

US Patent:
4996689, Feb 26, 1991
Filed:
Feb 1, 1989
Appl. No.:
7/305449
Inventors:
Muhammad A. Samad - Sunnyvale CA
Assignee:
VLSI Technology, Inc. - San Jose CA
International Classification:
G06F 1100
US Classification:
371 222
Abstract:
In the present invention a method for generating tests for a combinational logic circuit of the PLA type is disclosed. The method is suited to generate tests to determine the input signals, the mid-term output signals of the AND gates, and the output signals, for stuck-at-0 and stuck-at-1 conditions.

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