Alvin S Chen, 35Mountain View, CA

7219045, May 15, 2007

Sep 27, 2001

09/969186

Lifeng Wu - San Jose CA, US
Jeong Y. Choi - Portland OR, US
Alvin I. Chen - San Jose CA, US
Jingkun Fang - Santa Clara CA, US

Cadence Design Systems, Inc. - San Jose CA

G06F 17/50
G06F 9/45

703 14, 716 4, 716 12

The present invention is directed to methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects by allowing design rules on degradation to be included in the netlist. Once the hot-carrier circuit simulation is launched, the rules are checked and the reliability design rule violations are reported. The process can be performed on either the layout or schematic window. The design rule criteria can be any device parameter and can be expressed in absolute or relative terms. The criteria can be based on device type, model card name, instance geometry, or temperature. Additionally, values can be set prior to beginning the simulation.

7292968, Nov 6, 2007

Apr 11, 2001

09/832933

Lifeng Wu - Fremont CA, US
Zhihong Liu - Cupertino CA, US
Alvin I. Chen - San Jose CA, US
Jeong Y. Choi - Portland OR, US
Bruce W. McGaughy - Fremont CA, US

Cadence Design Systems, Inc. - San Jose CA

G06F 17/50
G06F 9/44

703 13, 717135

The present invention is directed to a number of improvements in methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects. A plurality of different circuit stress times can be simulated within a single run. Different aging criteria may be used for different circuit blocks, circuit block types, devices, device models and device types. The user may specify the degradation of selected circuit blocks, circuit block types, devices, device models and device types independently of the simulation. Device degradation can be characterized in tables. Continuous degradation levels can be quantized. Techniques are also described for representing the aged device in the netlist as the fresh device augmented with a plurality of independent current sources connected between its terminals to mimic the effects of aging in the device. The use of device model cards with age parameters is also described. To further improve the circuit reliability simulation, a gradual or multi-step aging is used instead of the standard one step aging process.

7567891, Jul 28, 2009

Sep 27, 2001

09/969185

Zhihong Liu - Cupertino CA, US
Lifeng Wu - Fremont CA, US
Jeong Y. Choi - Palo Alto CA, US
Ping Chen - San Jose CA, US
Alvin I. Chen - San Jose CA, US
Gang Zhang - Campbell CA, US

Cadence Design Systems, Inc. - San Jose CA

G06F 7/60
G06F 17/50
G06F 9/45
G01R 15/00
G01R 27/28
G01R 27/26
H03K 19/20
H03K 19/094

703 13, 703 2, 703 14, 716 4, 716 5, 324678, 326117, 326120, 326124, 702 57, 702117

The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of building device degradation models, including allowing the user to select a device parameter used to build the device degradation model independent of the device parameter selected. The user can also select the functional relation between stress time and degradation level. To further improve accuracy, multiple acceleration parameters can be used to account for different regions of the degradation process. Analytical functions may be used to represent aged device model parameters, either directly or by fitting measured device parameters versus device age values, allowing devices with different age values to share the same device model. The concept of binning is extended to include device degradation. In addition to a binning based on device width and length, age is added.

7835890, Nov 16, 2010

Oct 4, 2007

11/867554

Lifeng Wu - Fremont CA, US
Zhihong Liu - Cupertino CA, US
Alvin I. Chen - San Jose CA, US
Jeong Y. Choi - Portland OR, US
Bruce W. McGaughy - Fremont CA, US

Cadence Design Systems, Inc. - San Jose CA

G06F 17/50
G06F 9/44

703 2, 703 14, 703 17, 717124, 324719

The present invention is directed to a number of improvements in methods for reliability simulations in aged circuits whose operation has been degraded through hot-carrier or other effects. A plurality of different circuit stress times can be simulated within a single run. Different aging criteria may be used for different circuit blocks, circuit block types, devices, device models and device types. The user may specify the degradation of selected circuit blocks, circuit block types, devices, device models and device types independently of the simulation. Device degradation can be characterized in tables. Continuous degradation levels can be quantized. Techniques are also described for representing the aged device in the netlist as the fresh device augmented with a plurality of independent current sources connected between its terminals to mimic the effects of aging in the device. The use of device model cards with age parameters is also described. To further improve the circuit reliability simulation, a gradual or multi-step aging is used instead of the standard one step aging process.

2009029, Dec 3, 2009

Jun 17, 2009

12/486191

Zhihong Liu - Cupertino CA, US
Lifeng Wu - Fremont CA, US
Jeong Y. Choi - Palo Alto CA, US
Ping Chen - San Jose CA, US
Alvin I. Chen - San Jose CA, US
Gang Zhang - Campbell CA, US

G06F 17/50
G01R 31/26

703 13, 324719, 703 14

The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of building device degradation models, including allowing the user to select a device parameter used to build the device degradation model independent of the device parameter selected. The user can also select the functional relation between stress time and degradation level. To further improve accuracy, multiple acceleration parameters can be used to account for different regions of the degradation process. Analytical functions may be used to represent aged device model parameters, either directly or by fitting measured device parameters versus device age values, allowing devices with different age values to share the same device model. The concept of binning is extended to include device degradation. In addition to a binning based on device width and length, age is added. In an exemplary embodiment, only devices with minimum channel length have degraded models constructed. The present invention also allows the degradation of one device parameter to be determined based on an age value derived from another parameter. In yet another aspect, a degraded device is modeled as a fresh device with a voltage source connected to a terminal.

6278964, Aug 21, 2001

May 29, 1998

9/087413

Jingkun Fang - Santa Clara CA
Hirokazu Yonezawa - Hyogo, JP
Lifeng Wu - Fremont CA
Yoshiyuki Kawakami - Osaka, JP
Nobufusa Iwanishi - Osaka, JP
Alvin I-Hsien Chen - Santa Clara CA
Norio Koike - Kyoto, JP
Ping Chen - Santa Clara CA
Zhihong Liu - Sunnyvale CA

Matsushita Electric Industrial Co., Ltd. - Osaka
BTA Technology Inc. - Santa Clara CA

G06F 1126
G05B 2302

703 19

An approach for simulating hot carrier effects in an integrated circuit (IC) at the circuit level includes generating a hot carrier library of delay data for each cell in the IC, using the hot carrier library data to generate a set of scaled timing data for the IC and using the scaled timing data with a IC performance simulator to simulate the IC operation. The scaled timing data is based upon the cell delay data and time-based switching activity of each cell in the IC.

2022035, Nov 10, 2022

Sep 11, 2020

17/641940

- EINDHOVEN, NL
Torre Michelle BYDLON - MELROSE MA, US
Alvin CHEN - CAMBRIDGE MA, US
William MCNAMARA - VALHALLA NY, US

G06V 20/70
G06V 10/44
G06T 7/73
G06T 7/00
G06T 7/13
G06T 7/246
G06V 10/764
G06T 7/30
G06T 11/00
A61B 1/00

A controller () for live annotation of interventional imagery includes a memory () that stores software instructions and a processor () that executes the software instructions. When executed by the processor (), the software instructions cause the controller () to implement a process that includes receiving (S) interventional imagery during an intraoperative intervention and automatically analyzing (S) the interventional imagery for detectable features. The process executed when the processor () executes the software instructions also includes detecting (S) a detectable feature and determining (S) at add an annotation to the interventional imagery for the detectable feature. The processor further includes identifying (S) a location for the annotation as an identified location in the interventional imagery and adding (S) the annotation to the interventional imagery at the identified location to correspond to the detectable feature. During the intraoperative intervention, a video is output (S) as video output based on interventional imagery and the annotation, including the annotation overlaid on the interventional imagery at the identified location.

2022027, Sep 1, 2022

Aug 12, 2020

17/634752

- EINDHOVEN, NL
Kunal VAIDYA - BOSTON MA, US
Molly Lara FLEXMAN - MELROSE MA, US
Alyssa TORJESEN - CHARLESTOWN MA, US
Ameet Kumar JAIN - BOSTON MA, US
Alvin CHEN - CAMBRIDGE MA, US
Shyam BHARAT - ARLINGTON MA, US
Ramon Quido ERKAMP - SWAMPSCOTT MA, US

A61B 8/00
A61B 8/08

A system for localizing a three-dimensional field of view of a beamforming ultrasound imaging probe based on a position indicator disposed within said field of view. The beamforming ultrasound imaging probe transmits and receives ultrasound signals within a three-dimensional field of view comprising a plurality of predetermined sub-volumes, each sub-volume being defined by a two dimensional array of beams. A controller causes the beamforming ultrasound imaging probe to scan the sub-volumes sequentially by transmitting and receiving ultrasound signals corresponding to each beam. A tracking system determines a position of the position indicator within the three-dimensional field of view; and determines a sub-volume in which the position indicator is located. The controller causes the beamforming ultrasound imaging probe to provide a localized field of view including the position of the position indicator by constraining the transmitting and receiving of ultrasound signals to a portion of the sub-volume in which the position indicator is located.