Ben Yuh-Chuan Chen, 5241 Modena, Irvine, CA 92618

6770260, Aug 3, 2004

Aug 26, 1996

08/704445

Ben Chen - Fremont CA
Chris Fraser - Los Altos CA
Irv Weissman - Redwood City CA

Novartis AG - Basel

A61K 4900

424 92, 424 9321, 4242781, 800 14

The invention provides methods for preventing depletion of non-autologous hematopoietic cells. Animal model systems using the method are also provided as are methods of treatment using non-autologous hematopoietic cells.

6993618, Jan 31, 2006

Jan 15, 2004

10/707835

Ben Wei Chen - Fremont CA, US

Super Talent Electronics, Inc. - San Jose CA

G06F 13/00
G06F 1/16

710305, 710301, 711115

A flash-card exchanger has two modes of operation. When a host personal computer (PC) is connected to a Universal-Serial-Bus (USB) connector, the flash-card exchanger operates in a card reader mode, allowing the host to read data from removable flash-memory cards inserted into connector slots of the flash-card exchanger. When the host PC is not connected, a USB flash-memory thumb or key-chain drive can be inserted into a second USB connector. A USB dual-mode microcontroller acts as a USB host, reading data from the removable flash-memory card and writing the data to the USB-memory key drive using USB packets. Since the USB-memory key drive is small and removable, the user can upgrade to larger storage capacities by plugging in a larger-capacity USB-memory key drive. A flash-exchanger program executing on the USB dual-mode microcontroller copies data from an input-output bus and generates USB packets to the USB-memory key drive.

7073010, Jul 4, 2006

Dec 2, 2003

10/707276

Ben Wei Chen - Fremont CA, US

Super Talent Electronics, Inc. - San Jose CA

G06F 13/20

710313

A dual-mode Universal-Serial-Bus (USB) switch can operate in a normal hub mode to buffer transactions from a host to multiple USB flash storage blocks that are USB endpoints. When operating in a single-endpoint mode, the dual-mode USB switch intercepts packets from the host and responds to the host as a single USB endpoint. The USB switch aggregates all downstream USB flash storage blocks and reports a single pool of memory to the host as a single virtual USB memory. Adjacent transactions can be overlapped by packet re-ordering. A token packet that starts a following transaction is re-ordered to be sent to the USB flash storage blocks before the data and handshake packets that end a first transaction, allowing the second transaction to begin accessing the flash memory earlier. Data can be mirrored or striped across several USB flash storage blocks and parity can be added for error recovery.

7082056, Jul 25, 2006

Mar 12, 2004

10/800228

Ben Wei Chen - Fremont CA, US
Augustine W. Chang - San Jose CA, US

Super Talent Electronics, Inc. - San Jose CA

G11C 16/06

3651852, 36518521, 36518503

A FLASH memory has an array of FLASH cells that each store N multiple bits of information as charge stored on a floating gate. Reference voltages or currents are generated for each boundary between the 2states or levels and for an upper limit and a lower limit reference for each state. A selected bit line driven by a selected FLASH cell generates a sense node that is compared to a full range of 3*2−1 comparators in parallel. The compare results are decoded to determine which state is read from the selected FLASH cell. An in-range signal is activated when the sense node is between the upper and lower limit references. The target programming count or programming pulses is adjusted during calibration to sense in the middle of the upper and lower limit references. Margin between references is adjusted by calibration codes that select currents for summing.

7092697, Aug 15, 2006

Jan 6, 2003

10/337240

Jerry Kupsh - Concord CA, US
Xuming Chen - Walnut Creek CA, US
Ben Chen - Northboro MA, US
Robert Ephraim - Bridgewater NJ, US

Cellco Partnership - Bedminister NJ

H04M 11/00
H04Q 7/20

455406, 455408, 455466, 3791142

A method and system for facilitating prepaid mobile messaging. Mobile messages are forwarded to their intended one or more destinations before the debit account of the one or more prepaid mobile messaging subscribers associated with the mobile message are debited.

7103684, Sep 5, 2006

Dec 2, 2003

10/707277

Ben Wei Chen - Fremont CA, US
Charles C. Lee - Sunnyvale CA, US

Super Talent Electronics, Inc. - San Jose CA

G06F 3/00
G06F 13/28
G06F 13/12

710 62, 710 8, 710 20, 710 22, 710 72, 713 1, 713 2, 713 9

A Universal-Serial-Bus (USB) single-chip flash device contains a USB flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. USB packets from a host USB bus are read by a serial engine on the USB flash microcontroller. Various routines that execute on a CPU in the USB flash microcontroller are activated in response to commands in the USB packets. A flash-memory controller in the USB flash microcontroller transfers data from the serial engine to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.

7130958, Oct 31, 2006

Feb 9, 2004

10/708096

Ben Wei Chen - Fremont CA, US

Super Talent Electronics, Inc. - San Jose CA

G06F 12/00

711103, 710 5, 710313

A serial flash-memory chip has a serial-bus interface to an external controller. A flash-memory block in the serial flash-memory chip can be read by the external controller sending a read-request packet over the serial bus to the serial flash-memory chip, which reads the flash memory and sends the data back in a data-payload field in a completion packet. Data in a write-request packet is written to the flash memory, and a message packet sent back over the serial bus. The serial bus can be a Peripheral Component Interconnect (PCI) Express bus with bi-directional pairs of differential lines. Packets have modified-PCI-Express headers that define the packet type and data-payload length. Vendor-defined packets can send flash commands such as reset, erase, or responses after operations such as program or erase. A serial engine and microcontroller or state machine are on the serial flash-memory chip.

7378301, May 27, 2008

Jun 10, 2005

11/148999

Wei H. Koh - Irvine CA, US
Ben W. Chen - Fremont CA, US
David H. D. Chen - Irvine CA, US

Kingston Technology Corporation - Fountain Valley CA

H01L 21/50
H01L 21/48
H01L 21/44
H01L 23/28
H01L 23/495
H01L 23/31

438126, 438127, 438106, 438112, 438124, 257787, 257679, 257667, 257E23116, 257E23125, 257E23128

A method for molding digital storage memory cards such as, for example, multimedia cards (MMC), secure digital cards (SD), and similar small form factor digital memory cards. A PCA subassembly including, for example, a leadframe (TSOP) package for enclosing a flash IC and a (e. g. , land grad array) controller package for enclosing a controller IC are mounted on a printed wiring board within a mold cavity. A high melt flow index resin is injected into the mold cavity to form an integral, solid body within which to completely encapsulate the flash IC and controller packages and form a cover over top the flash IC package so as to maintain the required memory card height tolerance. In one embodiment, the resin material is injected downwardly into the mold cavity from locations above the respective rows of leads of the flash IC package. In another embodiment, the resin material is injected laterally into the mold body from locations at opposite sides thereof adjacent the respective rows of leads of the flash IC package.