Deepak V Kulkarni, 47Austin, TX

6363436, Mar 26, 2002

Jan 27, 1997

08/791446

Lee Emison Hagy - Austin TX
Grama Kasturi Harish - Cedar Park TX
James Darrell Heath - Austin TX
Chakravarthy Jagannadhan - Santa Clara CA
Deepak Anantarao Kulkarni - Austin TX

International Business Machines Corporation - Armonk NY

G06F 9445

709331, 717 10

A method and means for enhancing an embedded system includes a technique for generating shared library information which is stored in the ROM, the shared library information including pointers to structures for each shared library to be preloaded into the ROM, maintaining each module per library as a linked list. When the ROM image is generated, the tool writes the structures describing the preloaded libraries into the ROM image. As pointers to the structures are not valid in the ROM image, the pointers to these modules are relocated so that they are valid in the loaders address space when remapped into the loader by the kernel. At system start-up or âboot,â the kernel starts the embedded loader and maps the structures exactly where the loader expects to find them. Thus, when the loader attempts to load an external dynamically linked ELF executable file that is linked to one of the shared libraries in the ROM, the loader resolves all references to the preloaded library by traversing the structures provided that were mapped into its address space by the system kernel.

2011015, Jun 30, 2011

Dec 30, 2009

12/655407

Deepak V. Kulkarni - Chandler AZ, US
Carl L. Deppisch - Chandler AZ, US
Leonel R. Arana - Phoenix AZ, US
Gregory S. Constable - Chandler AZ, US
Sriram Srinivasan - Chandler AZ, US

B32B 15/04
B23K 31/02
B32B 38/00

428576, 228203, 1563073

Methods and associated structures of forming a package structure including forming a low melting point solder material on a solder resist opening location of an IHS keep out zone, forming a sealant in a non SRO keep out zone region; attaching the IHS to the sealant, and curing the sealant, wherein a solder joint is formed between the IHS and the low melting point solder material.

6052778, Apr 18, 2000

Jan 13, 1997

8/782724

Lee Emison Hagy - Austin TX
Grama Kasturi Harish - Cedar Park TX
James Darrell Heath - Austin TX
Deepak Anantarao Kulkarni - Austin TX
William Francis Quinn - Austin TX

International Business Machines Corporation - Armonk NY

G06F 9445

713 2

A method and means for enhancing an embedded system includes means for and steps of executing a boot routine; activating a ROM loader routine; initializing an I/O subsystem; activating an embedded OS; creating a dynamically linked embedded system loader task, and having the embedded OS map the Global Coerced Memory (GCM) and the Global Shared Memory (GSM) into its address space so that it can access shared libraries; loading each of a plurality of executable programs, and mapping the GCM and the GSM into each executable program's address space so it is able to access shared libraries.

2022023, Jul 28, 2022

Apr 8, 2022

17/716947

- Santa Clara CA, US
Gang DUAN - Chandler AZ, US
Deepak KULKARNI - Chandler AZ, US
Rahul MANEPALLI - Chandler AZ, US
Xiaoying GUO - Chandler AZ, US

H01L 23/00
H01L 21/48
H01L 21/56
H01L 23/31
H01L 23/538

Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, the electronic package comprises a mold layer having a first surface and a second surface opposite the first surface, and a plurality of first dies embedded in the mold layer. In an embodiment, each of the plurality of first dies has a surface that is substantially coplanar with the first surface of the mold layer. In an embodiment, the electronic package further comprises a second die embedded in the mold layer. In an embodiment, the second die is positioned between the plurality of first dies and the second surface of the mold layer.

2022023, Jul 28, 2022

Apr 8, 2022

17/716940

- Santa Clara CA, US
Gang Duan - Chandler AZ, US
Deepak Kulkarni - Chandler AZ, US

H01L 25/00
H01L 23/48
H01L 23/538
H01L 23/29
H01L 21/683
H01L 23/31

Techniques are provided for fine node heterogeneous-chip packages. In an example, a method of making a heterogeneous-chip package can include coupling electrical terminals of a first side of a first base die to electrical terminals of a first side of a second base die using a silicon bridge, forming an organic substrate about the silicon bridge and adjacent the first sides of the first and second base dies, and coupling a fine node die to a second side of at least one of the first base die or the second base die.

2022019, Jun 23, 2022

Dec 21, 2020

17/129846

- Santa Clara CA, US
Guruprasad ARAKERE - Chandler AZ, US
Deepak KULKARNI - Chandler AZ, US
Sairam AGRAHARAM - Chandler AZ, US
Wei-Lun K. JEN - Chandler AZ, US
Numair AHMED - Chandler AZ, US
Kousik GANESAN - Chandler AZ, US
Amol D. JADHAV - Chandler AZ, US

H01L 23/498
H01L 21/48

Embodiments disclosed herein include electronic packages and methods of forming such electronic packages. In an embodiment, an electronic package comprises a package substrate with a die side and a land side. In an embodiment, a pad is on the land side. In an embodiment, a dielectric layer covers sidewalls of the pad, and a surface finish is over an exposed surface of the pad.

2023013, Apr 27, 2023

Dec 27, 2022

18/089213

- Santa Clara CA, US
Debendra MALLIK - Chandler AZ, US
John S. GUZEK - Chandler AZ, US
Chia-Pin CHIU - Tempe AZ, US
Deepak KULKARNI - Chandler AZ, US
Ravi V. MAHAJAN - Chandler AZ, US

H01L 23/522
H01L 23/538
H01L 23/00
H01L 25/065
H01L 25/00

Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.

2023004, Feb 9, 2023

Oct 24, 2022

17/972340

- Santa Clara CA, US
Debendra MALLIK - Chandler AZ, US
John S. GUZEK - Chandler AZ, US
Chia-Pin CHIU - Tempe AZ, US
Deepak KULKARNI - Chandler AZ, US
Ravi V. MAHAJAN - Chandler AZ, US

H01L 23/522
H01L 25/00
H01L 23/00
H01L 25/065
H01L 23/538

Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.