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Dominic A Schepis9707 Mountain View Rd, Scottsdale, AZ 85258

Dominic Schepis Phones & Addresses

9707 Mountain View Rd, Scottsdale, AZ 85258    480-6619542   

9709 E Mountain View Rd UNIT 1605, Scottsdale, AZ 85258    480-6619542   

9709 Mountain View Rd, Scottsdale, AZ 85258    480-6619542   

9708 E Via Linda UNIT 1327, Scottsdale, AZ 85258    480-7677058   

9708 Via Linda, Scottsdale, AZ 85258    480-7677058    480-8600934   

Shoreline, WA   

Wayne, NJ   

Mentions for Dominic A Schepis

Publications & IP owners

Us Patents

Fully Amorphized Source/Drain For Leaky Junctions

US Patent:
6395587, May 28, 2002
Filed:
Feb 11, 2000
Appl. No.:
09/502809
Inventors:
Scott Crowder - Ossining NY
Dominic J. Schepis - Wappingers Falls NY
Melanie J. Sherony - Wappingers Falls NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2100
US Classification:
438149, 438144
Abstract:
A semiconductor device having a silicon-on-insulator (SOI) structure includes a field-effect transistor having amorphized source and drain regions formed by implanting silicon or germanium ions into a silicon layer formed over a buried insulator. The fully amorphized source and drain regions ultimately result in permanent crystalline defects that cause p-n junction leakage which allows charge in the body of the device to dissipate, thereby improving the overall efficiency and performance of the device. The source and drain regions are amorphized throughout their entire thickness to prevent single crystal re-crystallization from occurring during annealing and other subsequent processing steps that can degrade the quality of the p-n leakage junctions.

Fabrication Of Higher-K Dielectrics

US Patent:
2017017, Jun 15, 2017
Filed:
Dec 14, 2015
Appl. No.:
14/967914
Inventors:
- Armonk NY, US
Min Dai - Mahwah NJ, US
Dominic J. Schepis - Wappingers Falls NY, US
Shahab Siddiqui - Somers NY, US
International Classification:
H01L 21/8238
H01L 27/092
H01L 29/51
H01L 21/28
Abstract:
A method of manufacturing a semiconductor structure, and the resultant structure. The method includes forming an oxide layer above a substrate. The method includes forming a metal layer above the oxide layer. The method includes forming a first capping layer above the metal layer. A material forming the first capping layer may be titanium oxide, or titanium oxynitride. The method includes annealing the semiconductor structure. Annealing the semiconductor structure may result in diffusing a metal from the metal layer into the oxide layer.

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