Ed F Fischer, 77Bayside, NY

2012002, Jan 26, 2012

Dec 30, 2010

12/982790

Prakash GOPALAKRISHNAN - Wayne NJ, US
Michael MCSHERRY - Portland OR, US
David WHITE - San Jose CA, US
Ed FISCHER - Salem OR, US
Bruce YANAGIDA - Snohomish WA, US
Keith DENNISON - Edinburgh, GB

CADENCE DESIGN SYSTEMS, INC. - San Jose CA

G06F 17/50

716102

Disclosed are methods, systems, and articles of manufacture for implementing electronic designs with simulation awareness. A schematic is identified or created and simulated at the schematic level to characterize the functional behavior of the circuit or to ensure the circuit design meets the required design specifications. Physical data of a component of the design is identified, created, or updated, and the electrical parasitic associated with physical data is characterized. One or more electrical characteristics associated with the parasitic is further characterized and mapped to the simulator to re-simulate the circuit design to analyze the impact of parasitics. Some embodiments re-run the same simulation process incrementally in an interactive manner by accepting incremental design or parameter changes from the design environment.