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Kai Hsuan Cheng, 422540 Pocatello Ave, Rowland Heights, CA 91748

Kai Cheng Phones & Addresses

Rowland Heights, CA   

Lansing, MI   

2640 E California Blvd, San Marino, CA 91108   

45 Alice St #B, Arcadia, CA 91006   

Rowland Heights, CA   

Mentions for Kai Hsuan Cheng

Career records & work history

Lawyers & Attorneys

Kai Cheng Photo 1

Kai Cheng - Lawyer

ISLN:
924298002
Admitted:
2014

Kai Cheng resumes & CV records

Resumes

Kai Cheng Photo 36

Director At Chinese Academy Of Sciences

Position:
Director at Chinese Academy of Sciences
Location:
Greater Los Angeles Area
Industry:
Research
Work:
Chinese Academy of Sciences
Director

Publications & IP owners

Us Patents

Snoop Filter Bypass

US Patent:
7093079, Aug 15, 2006
Filed:
Dec 17, 2002
Appl. No.:
10/323200
Inventors:
Tuan M. Quach - Fullerton CA, US
Lily Pao Looi - Portland OR, US
Kai Cheng - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/08
US Classification:
711141, 711146, 711137
Abstract:
Machine-readable media, methods, and apparatus are described for processing coherent requests of a computing device comprising multiple cache nodes. In some embodiments, a coherent switch may receive from a requesting cache node a coherent request for a line of memory. The coherent switch may further issue snoop requests to one or more non-requesting cache nodes based upon whether a snoop filter bypass mode is enabled. In particular, the coherent switch when not in snoop filter bypass mode may obtain coherency data from a snoop filter and may issue snoop requests to zero or more non-requesting cache nodes based upon the coherency data obtained from the snoop filter. Further, the coherent switch when in snoop filter bypass mode may bypass the snoop filter and may issue snoop requests to all non-requesting cache agents.

Programmable Protocol To Support Coherent And Non-Coherent Transactions In A Multinode System

US Patent:
7617329, Nov 10, 2009
Filed:
Dec 30, 2002
Appl. No.:
10/335001
Inventors:
Tuan M. Quach - Fullerton CA, US
Lily P. Looi - Portland OR, US
Kai Cheng - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 15/16
US Classification:
709253, 709230, 711118, 711131, 711140, 711141, 711146
Abstract:
A system includes a scalability port switch (SPS) and a plurality of nodes. The SPS has a plurality of ports, each port coupled to a node. Each port is connected to a scalability port protocol distributed (SPPD). A snoop filter in the SPS tracks which nodes may be using various memory addresses. A scalability port protocol central (SPPC) is responsible for processing messages to support coherent and non-coherent transactions in the system.

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