BackgroundCheck.run
Search For

Lu Chen, 57PO Box 6108, Moraga, CA 94570

Known as:
Larry Chen Lu Chin Jun Chen Lu
Related to:
Xue Chen 57 Xiurong Chen Xi Chen 53 Xiao O Chen 55 Lei Chen 54

Lu Chen Phones & Addresses

25 Linden Ave, Somerville, MA 02143   

Fairfield, CA   

5 Kimberly Dr, Moraga, CA 94556   

Berkeley, CA   

5 Edwards St, Quincy, MA 02169   

Louisville, KY   

Fremont, CA   

New Haven, CT   

Get Report
Control this profile

Mentions for Lu Chen

Career records & work history

Lawyers & Attorneys

Lu Chen Photo 1

Lu Chen - Lawyer

ISLN:
924302662
Admitted:
2012
Lu Chen Photo 2

Lu Chen - Lawyer

Office:
Fasken Martineau DuMoulin LLP
Specialties:
Banking & Finance
ISLN:
922297281
University:
Heilongjiang University, China, 2003; Seneca College, 2008; Seneca College, 2008

Lu Chen resumes & CV records

Resumes

Lu Chen Photo 40

Lu Chen - Boston, MA

Work:
Cubist Pharmaceuticals Jun 2013 to 2000
Financial Analyst The Marble Collection - Lakeville, MA Jun 2013 to Sep 2013
Full Charge Bookkeeper Charles River Public Internet Center - Waltham, MA Feb 2013 to Apr 2013
VITA Tax Volunteer Wisecorol CPA Firm Feb 2012 to Mar 2012
Auditing Intern
Education:
Bentley University, Graduate School of Business - Waltham, MA Sep 2012
Master of Science in Accountancy Southwestern University Of Finance and Economics 2008 to 2012
Bachelor of Science in Accounting
Skills:
Excel (Pivot Table, Vlookup), PowerPoint, Oracle, GL Wand, Cognos, Adaptive Planning, QuickBooks
Lu Chen Photo 41

Lu Chen - Boston, MA

Education:
Boston University - Boston, MA Jan 2009 to Jan 2011
MFA in Graphic Design
Skills:
Graphic design, Web Design

Publications & IP owners

Us Patents

Boost Regulator With Integrated Load Switch

US Patent:
2007023, Oct 11, 2007
Filed:
Apr 11, 2006
Appl. No.:
11/279375
Inventors:
Tim Yu - Fremont CA, US
Lu Chen - San Jose CA, US
Assignee:
Advanced Analogic Technologies, Inc. - Sunnyvale CA
International Classification:
G05F 1/00
US Classification:
323282000
Abstract:
A boost regulator includes a diode D connected between a node Vand an output node V. The node Vis connected to ground by a first switch MA second switch Mand an inductor L are connected in series between the node Vand an input node V. The regulator has an enabled state and a disabled state. In the enabled stage, a control circuit turns the second switch on and drives the first switch using a PFM, PWM or other strategy. In the disabled state, control circuit turns the second switch off to prevent current passing through the regulator to the load.

System, Method And Computer Program Product For Associating A Record With An Account From An On-Demand Database System

US Patent:
2011023, Sep 29, 2011
Filed:
Nov 18, 2010
Appl. No.:
12/949723
Inventors:
Jeanine Walters - San Francisco CA, US
Pratima Arora - Sunnyvale CA, US
Don C. Jay - San Francisco CA, US
Herman Kwong - Danville CA, US
John Liang - Castro Valley CA, US
Yuan (Peter) Wang - Alameda CA, US
Rachna Singh - Foster City CA, US
Lu Ping Chen - Oakland CA, US
Frank Lopez - San Francisco CA, US
Assignee:
SALESFORCE.COM, INC. - San Francisco CA
International Classification:
G06F 17/30
US Classification:
707610, 707769, 707E17005, 707E17014
Abstract:
In accordance with embodiments, there are provided mechanisms and methods for associating a record with an account from an on-demand database system. These mechanisms and methods for associating a record with an account from an on-demand database system can enable improved synchronization between an on-demand database system and a software element separate from the on-demand database system, etc.

Associating Objects In Multi-Tenant Systems

US Patent:
2013003, Jan 31, 2013
Filed:
Feb 9, 2012
Appl. No.:
13/369858
Inventors:
Ganesh Mathrubootham - Fremont CA, US
Qian Lu - San Francisco CA, US
Lu Ping Chen - Walnut Creek CA, US
Shahid H. Khatri - Fremont CA, US
Hui Fung Herman Kwong - San Francisco CA, US
Kayvaan Ghassemieh - San Francisco CA, US
Assignee:
SALESFORCE.COM, INC. - San Francisco CA
International Classification:
G06F 3/048
G06F 7/00
US Classification:
715764, 707802, 707E17044
Abstract:
Methods and systems are provided for associating objects in a database. An exemplary method involves identifying one or more objects in the database that are likely to be related to a first object in the database that is based on data obtained from a local application associated with a user and displaying the identified objects on a client device associated with the user. In exemplary embodiments, the identified objects are displayed in response to selection of a graphical user interface element enabling indication of a second object from among the one or more objects, wherein the first object is associated with the second object in the database after receiving indication of the second object. In one or more exemplary embodiments, the database is a multi-tenant database in a multi-tenant system providing instances of a virtual application to multiple tenants.

Methods And Systems For Creating Software Tests As Executable Resources

US Patent:
2013005, Feb 28, 2013
Filed:
Aug 30, 2012
Appl. No.:
13/599864
Inventors:
Rajeshwar Vishwanath Patil - Fremont CA, US
Ramesh Babu Mandava - Santa Clara CA, US
Sayantan Satpati - Fremont CA, US
Lu Chen - San Jose CA, US
Lax Sharma - San Jose CA, US
Ramesh Dara - Fremont CA, US
Assignee:
eBay Inc. - San Jose CA
International Classification:
G06F 11/36
US Classification:
714 381, 714E11208
Abstract:
Described herein is a new approach for testing in which tests are instrumented and exposed as addressable resources using a REST-ful approach. With this new approach, instrumentation, provisioning and execution of tests are de-coupled, which is not the case with current, traditional testing approaches.

Methods And Compositions For Modulating Lymphangiogenesis, E.g., To Treat Transplant Rejection, In A Subject

US Patent:
2014005, Feb 20, 2014
Filed:
Aug 14, 2013
Appl. No.:
13/966760
Inventors:
Lu Chen - Berkeley CA, US
International Classification:
A61K 39/395
US Classification:
4241721
Abstract:
Methods of modulating the occurrence of lymphangiogenesis in a subject are provided. In some instances, the method is a method of treating transplant rejection in the subject. Aspects of the methods include administering to the subject an effective amount of: a first antagonist for a tyrosine kinase receptor and a second antagonist for an integrin receptor. In some embodiments, the methods include enhancing survival of transplanted tissue in a subject. Aspects of the invention further include compositions, e.g., pharmaceutical compositions and kits that find use in methods of the invention.

Impurity Removal In Doped Ald Tantalum Nitride

US Patent:
2022032, Oct 13, 2022
Filed:
Jun 29, 2022
Appl. No.:
17/853150
Inventors:
- Santa Clara CA, US
Xiangjin Xie - Fremont CA, US
Tae Hong Ha - San Jose CA, US
Xianmin Tang - San Jose CA, US
Lu Chen - Cupertino CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/768
C23C 16/455
C23C 16/34
Abstract:
Methods of forming copper interconnects are described. A doped tantalum nitride layer formed on a copper layer on a substrate has a first amount of dopant. The doped tantalum nitride layer is exposed to a plasma comprising one or more of helium or neon to form a treated doped tantalum nitride layer with a decreased amount of dopant. Apparatus for performing the methods are also described.

Impurity Removal In Doped Ald Tantalum Nitride

US Patent:
2021040, Dec 30, 2021
Filed:
Jun 28, 2020
Appl. No.:
16/914416
Inventors:
- Santa Clara CA, US
Xiangjin Xie - Fremont CA, US
Tae Hong Ha - San Jose CA, US
Xianmin Tang - San Jose CA, US
Lu Chen - Cupertino CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/768
C23C 16/34
C23C 16/455
Abstract:
Methods of forming copper interconnects are described. A doped tantalum nitride layer formed on a copper layer on a substrate has a first amount of dopant. The doped tantalum nitride layer is exposed to a plasma comprising one or more of helium or neon to form a treated doped tantalum nitride layer with a decreased amount of dopant. Apparatus for performing the methods are also described.

Methods And Apparatus For Precleaning And Treating Wafer Surfaces

US Patent:
2021037, Dec 2, 2021
Filed:
Jun 1, 2020
Appl. No.:
16/889017
Inventors:
- Santa Clara CA, US
Carmen LEAL CERVANTES - Mountain View CA, US
Feng CHEN - San Jose CA, US
Lu CHEN - Cupertino CA, US
Wenjing XU - San Jose CA, US
Aravind KAMATH - San Jose CA, US
Cheng-Hsiung Matthew TSAI - Cupertino CA, US
Tae Hong HA - San Jose CA, US
Alexander JANSEN - San Jose CA, US
Xianmin TANG - San Jose CA, US
International Classification:
C23C 14/56
H01L 21/02
H01L 21/67
H01J 37/32
Abstract:
Methods and apparatus for processing a substrate include cleaning and self-assembly monolayer (SAM) formation for subsequent reverse selective atomic layer deposition. An apparatus may include a process chamber with a processing volume and a substrate support including a pedestal, a remote plasma source fluidly coupled to the process chamber and configured to produce radicals or ionized gas mixture with radicals that flow into the processing volume to remove residue or oxides from a surface of the substrate, a first gas delivery system with a first ampoule configured to provide at least one first chemical into the processing volume to produce a SAM on the surface of the substrate, a heating system located in the pedestal and configured to heat a substrate by flowing gas on a backside of the substrate, and a vacuum system fluidly coupled to the process chamber and configured to control heating of the substrate.

Possible Relatives

Cynthia Chen  David Chen  Cyril X Chen  Cyrus Y Chen  Dawei W Chen  De T Chen  Dafang Chen  Lu Meng  Lu Li  Lu Liu 

NOTICE: You may not use BackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. BackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.