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Murali VemulaFremont, CA
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Us Patents
Methods And Apparatus For Efficient Modification Of Values Within Computing Registers
US Patent:
8549251, Oct 1, 2013
Filed:
Dec 15, 2010
Appl. No.:
12/968884
Inventors:
Murali Vemula - Fremont CA, US
Sathish Shenoy - San Jose CA, US
Sathish Shenoy - San Jose CA, US
Assignee:
Juniper Networks, Inc. - Sunnyvale CA
International Classification:
G06F 13/00
G06F 13/28
G06F 13/28
US Classification:
711173, 711155, 711159, 712224, 712225
Abstract:
In some embodiments, an apparatus includes a register having a first portion and a second portion. The first portion of the register has multiple bits and the second portion of the register has multiple bits. Each bit from the multiple bits of the first portion of the register is associated with a bit from the multiple bits of the second portion of the register such that a bit from the multiple bits of the first portion of the register is set for its associated bit from the multiple bits of the second portion of the register to be written.
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