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Philip Edward Pfeiffer, 46Fort Wayne, IN

Philip Pfeiffer Phones & Addresses

Fort Wayne, IN   

783 Kirkwood Ct, Columbia City, IN 46725    260-2443342   

Cedar Rapids, IA   

Marion, IA   

Aberdeen, MD   

Havre de Grace, MD   

Dayton, OH   

Bel Air, MD   

Work

Company: Lochkeed martin Jun 2013 Position: Sr. staff asic/fpga design engineer

Education

School / High School: Purdue University- West Lafayette, IN 2002 Specialities: Graduate Studies in DSP and Algorithms

Skills

VHDL • Verilog • C/C++ • Tcl • Modelsim PE/SE • Questasim • Active-HDL • HDL Designer • RTL Design • Chipscope • Synplify • Precision • Leonardo • Actel Libero • Xilinx ISE • Altera Quartus • DOORS • PVCS • CVS • SVN • TFS • Code Composer Studio • Code Collaborator • Lint • Multi Project Builder • VectorCAST • Beyond Compare • Green Hills Software Integrity • JIRA • Widows • Linux • Microsoft Project • Oscilloscope • Logic Analyzer • Spectrum Analyzer • Multipath Generator • Noise Generator • Test and Integration Lab • Faraday Cage • Clean Room

Mentions for Philip Edward Pfeiffer

Philip Pfeiffer resumes & CV records

Resumes

Philip Pfeiffer Photo 29

Principal Fpga Engineer

Location:
401 College Ave west, Ada, OH 45810
Industry:
Defense & Space
Work:
Rockwell Collins Mar 2015 - Oct 2018
Senior Asic and Fpga Engineer
Raytheon Mar 2015 - Oct 2018
Principal Fpga Engineer
Lockheed Martin Jun 2013 - Mar 2015
Senior Staff Vhdl Programmer
Edaptive Computing, Inc. Feb 2012 - Jun 2013
Senior Developer Ii
Exelis Jun 2001 - Dec 2011
Senior Engineer Asic and Fpga Design
Ohio Northern University Jan 2000 - Dec 2000
Teaching Assistant
Medvital Aug 2000 - Aug 2000
Consultant
Georgia Tech Research Institute May 2000 - Jul 2000
Technology Temp
Hobart Service May 1998 - Aug 1998
Qa Software Tester
Education:
Indiana University - Purdue University Nov 2009
Purdue University Fort Wayne 2009 - 2009
Purdue University May 2003
Purdue University 2002 - 2003
Ohio Northern University 1997 - May 2001
Bachelors, Bachelor of Science, Computer Engineering
Georgia Tech Research Institute Jul 2000
Skills:
Fpga, Vhdl, Xilinx, Digital Signal Processors, Simulations, Testing, Modelsim, Altera, C++, Rtl Design, C, Actel, Digital Electronics, Hardware Architecture, Embedded Systems, Field Programmable Gate Arrays, Asic, Static Timing Analysis, Rtl Coding, Verilog, Debugging, Firmware, Digital Signal Processing, Telelogic Doors, Ms Project, Microprocessors, Embedded Software, Tcl, Eda, Code Composer Studio, Pvcs, Cvs, Visio, Microsoft Office, Tortoise Svn, Timing Closure, Physical Verification, Signal Integrity, Schematic Capture, Analog Circuit Design, System Design, Assembly Language, Unix, Integrated Circuit Design, Spectrum Analyzer, Systemverilog, Security Clearance, Uvm
Languages:
English
German
Philip Pfeiffer Photo 30

Philip Pfeiffer

Philip Pfeiffer Photo 31

Philip Pfeiffer - Havre de Grace, MD

Work:
Lochkeed Martin Jun 2013 to 2000
Sr. Staff ASIC/FPGA Design Engineer
Edaptive Computing Inc - Dayton, OH Feb 2012 to Jun 2013
Sr. ASIC/FPGA Design Engineer II
ITT Exelis Inc - Fort Wayne, IN Jun 2001 to Jan 2012
Sr. ASIC/FPGA Design Engineer
Ohio Northern University ECE Dept - Ada, OH 2000 to Dec 2000
Teaching Assistant
MEDvital - Newport Beach, CA Aug 2000 to Aug 2000
Consultant
Georgia Tech Research Institute - Atlanta, GA May 2000 to Jul 2000
Technology Temp
PMI Food Equipment Group, Hobart Division - Troy, OH May 1998 to Aug 1998
QA Software Tester
Education:
Purdue University - West Lafayette, IN 2002 to 2003
Graduate Studies in DSP and Algorithms
Ohio Northern University - Ada, OH May 2001
Bachelor of Science in Electrical and Computer Engineering
Skills:
VHDL, Verilog, C/C++, Tcl, Modelsim PE/SE, Questasim, Active-HDL, HDL Designer, RTL Design, Chipscope, Synplify, Precision, Leonardo, Actel Libero, Xilinx ISE, Altera Quartus, DOORS, PVCS, CVS, SVN, TFS, Code Composer Studio, Code Collaborator, Lint, Multi Project Builder, VectorCAST, Beyond Compare, Green Hills Software Integrity, JIRA, Widows, Linux, Microsoft Project, Oscilloscope, Logic Analyzer, Spectrum Analyzer, Multipath Generator, Noise Generator, Test and Integration Lab, Faraday Cage, Clean Room

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