BackgroundCheck.run
Search For

Roger Kunghowe Cheng, 46Campbell, CA

Known as:
Roger K Cheng Robert Callahan
Related to:
Tze Henn Cheng 52

Roger Cheng Phones & Addresses

Campbell, CA   

2418 Villanova Rd, San Jose, CA 95130    408-6886876   

Saratoga, CA   

Frostproof, FL   

3466 Data Dr, Rancho Cordova, CA 95670    916-8519361   

Cerritos, CA   

Cameron Park, CA   

Long Beach, CA   

Los Angeles, CA   

Get Report
Control this profile

Mentions for Roger Kunghowe Cheng

Career records & work history

Medicine Doctors

Roger T. Cheng

Specialties:
Internal Medicine
Work:
Roger T Cheng MD
12712 Heacock St STE 10, Moreno Valley, CA 92553
951-2471188 (phone)
Roger T Cheng MD
3975 Jackson St STE 106, Riverside, CA 92503
951-3542500 (phone)
Education:
Medical School
China Med Coll, Taichung, Taiwan (385 05 Prior 1/71)
Graduated: 1979
Procedures:
Electrocardiogram (EKG or ECG), Vaccine Administration
Conditions:
Acute Bronchitis, Bronchial Asthma, Chronic Renal Disease, Contact Dermatitis, Diabetes Mellitus (DM), Disorders of Lipoid Metabolism, Gout, Hypertension (HTN), Skin and Subcutaneous Infections, Acne, Acute Conjunctivitis, Acute Sinusitis, Acute Upper Respiratory Tract Infections, Alcohol Dependence, Allergic Rhinitis, Alzheimer's Disease, Anemia, Anxiety Phobic Disorders, Atopic Dermatitis, Atrial Fibrillation and Atrial Flutter, Bacterial Pneumonia, Benign Polyps of the Colon, Benign Prostatic Hypertrophy, Bipolar Disorder, Breast Disorders, Candidiasis of Vulva and Vagina, Cardiac Arrhythmia, Carpel Tunnel Syndrome, Cholelethiasis or Cholecystitis, Chronic Bronchitis, Cirrhosis, Constipation, Depressive Disorders, Dermatitis, Diverticulitis, Emphysema, Erectile Dysfunction (ED), Female Infertility, Fractures, Dislocations, Derangement, and Sprains, Gastritis and Duodenitis, Gastroesophageal Reflux Disease (GERD), Gastrointestinal Hemorrhage, Glaucoma, Hearing Loss, Heart Failure, Hemorrhoids, Herpes Genitalis, Herpes Zoster, Hyperthyroidism, Hypothyroidism, Inflammatory Bowel Disease (IBD), Insomnia, Iron Deficiency Anemia, Ischemic Heart Disease, Ischemic Stroke, Malignant Neoplasm of Female Breast, Melanoma, Metabolic Syndrome, Migraine Headache, Multiple Sclerosis (MS), Non-Toxic Goiter, Obstructive Sleep Apnea, Osteoarthritis, Osteoporosis, Otitis Media, Ovarian Dysfunction, Peripheral Nerve Disorders, Plantar Warts, Psoriasis, Rheumatoid Arthritis, Schizophrenia, Sciatica, Spinal Stenosis, Substance Abuse and/or Dependency, Tension Headache, Transient Cerebral Ischemia, Urinary Incontinence, Varicose Veins, Venous Embolism and Thrombosis, Ventral Hernia, Vitamin B12 Deficiency Anemia, Vitamin D Deficiency
Languages:
Chinese, English, Spanish
Description:
Dr. Cheng graduated from the China Med Coll, Taichung, Taiwan (385 05 Prior 1/71) in 1979. He works in Riverside, CA and 1 other location and specializes in Internal Medicine. Dr. Cheng is affiliated with Parkview Community Hospital Medical Center and Riverside Community Hospital.
Roger Cheng Photo 1

Roger C Cheng

Roger Cheng resumes & CV records

Resumes

Roger Cheng Photo 42

Business Analyst

Position:
Business Analyst at Davids Bridal
Location:
Conshohocken, Pennsylvania
Industry:
Information Technology and Services
Work:
Davids Bridal since Nov 2011
Business Analyst Five Below 2012 - 2012
Business Analyst Unisys Jul 2008 - May 2011
Consultant 4 UNISYS - Sprint Nextel Jul 2008 - May 2011
Consultant 4
Education:
Drexel University 2004 - 2008
BSIST, Information Systems Technology
Languages:
Chinese (Mandarin)
Roger Cheng Photo 43

Roger Cheng

Location:
United States

Publications & IP owners

Us Patents

Pvt Controller For Programmable On Die Termination

US Patent:
7403034, Jul 22, 2008
Filed:
Jan 19, 2006
Appl. No.:
11/337131
Inventors:
Navneet Dour - Folsom CA, US
Roger K. Cheng - Folsom CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H03K 17/16
US Classification:
326 32, 326 30, 326 86, 327108
Abstract:
Embodiments include an on die termination circuit. The on die termination circuit may be programmable. The on die termination circuit may be programmed to compensate for environmental conditions and the physical characteristics of the device. The programmed on die termination circuit allows for faster transfer rates over communication lines by reducing the time needed to recover from signal reflection and similar issues.

Calibrating Integrating Receivers For Source Synchronous Protocol

US Patent:
7602859, Oct 13, 2009
Filed:
Apr 28, 2005
Appl. No.:
11/118228
Inventors:
Roger K. Cheng - San Jose CA, US
Harishankar Sridharan - Folsom CA, US
Navneet Dour - Folsom CA, US
Hing Y. To - Cupertino CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H04L 27/00
US Classification:
375316, 375224, 375226, 375354, 375371
Abstract:
An embodiment of the present invention is a technique to calibrate an integrating receiver. A delay calibration circuit calibrates an adjusting code of a chain of delay elements and positioning of at least an integrating strobe used to define an integration window for the integrating receiver. An integrating receiver pulse generator generates an IR pulse from the at least integrating strobe. A calibration controller controls calibrating the adjusting code and the positioning of the at least integrating strobe.

Dual-Path Clocking Architecture

US Patent:
7692457, Apr 6, 2010
Filed:
Jun 30, 2008
Appl. No.:
12/217098
Inventors:
Hing Y. To - Cupertino CA, US
Roger K. Cheng - Saratoga CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H03L 7/00
US Classification:
327144, 327292
Abstract:
A method and device are disclosed. In one embodiment the method includes driving a first clock domain reference signal on a first clock tree and driving a second clock domain reference signal on a second clock tree. The first tree routes the first signal from a PLL to a first clock domain drop off circuit and the second tree routes the second signal from the PLL to a second clock domain drop off circuit. A jitter produced from the second tree is less than a jitter produced from the first tree. The method continues by detecting any phase misalignment between the first signal and the second signal. The method also causes the first signal to be delayed so that it aligns with the second signal.

Method And Apparatus For Pvt Controller For Programmable On Die Termination

US Patent:
2005019, Sep 8, 2005
Filed:
Mar 8, 2004
Appl. No.:
10/796353
Inventors:
Navneet Dour - Folsom CA, US
Roger Cheng - Folsom CA, US
International Classification:
H03K019/003
US Classification:
326030000
Abstract:
Embodiments include an on die termination circuit. The on die termination circuit may be programmable. The on die termination circuit may be programmed to compensate for environmental conditions and the physical characteristics of the device. The programmed on die termination circuit allows for faster transfer rates over communication lines by reducing the time needed to recover from signal reflection and similar issues.

Integrating Receivers For Source Synchronous Protocol

US Patent:
2006024, Nov 2, 2006
Filed:
Apr 28, 2005
Appl. No.:
11/118227
Inventors:
Roger Cheng - San Jose CA, US
Navneet Dour - Folsom CA, US
Scott Miller - Folsom CA, US
David Freker - Sacramento CA, US
Harishankar Sridharan - Folsom CA, US
Mahmood Alam - Portland OR, US
International Classification:
H04B 1/00
US Classification:
375145000
Abstract:
An embodiment of the present invention is a technique to integrate data for a source synchronous protocol. A delay generator generates at least an integrating strobe from a data strobe synchronizing a data having a data window using the source synchronous protocol. A pulse generator generates a pulse from the at least integrating strobe. An integrating receiver integrates the data over an integration window defined by the pulse. The integration window is within the data window.

Duty Cycle Correction System And Low Dropout (Ldo) Regulator Based Delay-Locked Loop (Dll)

US Patent:
2021032, Oct 14, 2021
Filed:
Jun 24, 2021
Appl. No.:
17/357456
Inventors:
- Santa Clara CA, US
Roger Cheng - San Jose CA, US
Hari Venkatramani - San Jose CA, US
Navneet Dour - El Dorado Hills CA, US
Mozhgan Mansuri - Hillsboro OR, US
Bryan Casper - Ridgefield WA, US
Frank O'Mahony - Portland OR, US
Ganesh Balamurugan - Hillsboro OR, US
Kuan Zhou - Portland OR, US
Sridhar Tirumalai - Chandler AZ, US
Krishnamurthy Venkataramana - Folsom CA, US
Alex Thomas - El Dorado Hills CA, US
Quoc Nguyen - El Dorado Hills CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H03K 5/156
H03L 7/081
G11C 7/22
G06F 1/08
G11C 7/10
Abstract:
An apparatus is provided, where the apparatus includes a plurality of components; a first circuitry to generate a clock signal, and to supply the clock signal to the plurality of components; a second circuitry to estimate, for each of two or more components of the plurality of components, a corresponding duty cycle of the clock signal received at the corresponding component, wherein two or more duty cycles corresponding to the two or more components are determined; a third circuitry to determine an average of the two or more duty cycles; and a fourth circuitry to correct a duty cycle of the clock signal generated by the first circuitry, based at least in part on the average.

Dual Power I/O Transmitter

US Patent:
2020010, Apr 2, 2020
Filed:
Sep 29, 2018
Appl. No.:
16/147634
Inventors:
- Santa Clara CA, US
Mohammed G. MOSTOFA - Folsom CA, US
Rajesh INTI - Hillsboro OR, US
Roger K. CHENG - San Jose CA, US
Aaron MARTIN - El Dorado CA, US
Christopher MOZAK - Portland OR, US
Pavan Kumar KAPPAGANTULA - San Mateo CA, US
Mozhgan MANSURI - Hillsboro OR, US
James JAUSSI - Hillsboro OR, US
Harishankar SRIDHARAN - Santa Clara CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G11C 7/10
G06F 13/16
G06F 1/32
Abstract:
An apparatus is provided which comprises: a first power supply rail to provide a first power supply; second and third power supply rails to provide second and third power supplies, respectively, wherein a voltage level of the first power supply is higher than a voltage level of each of the second and third power supplies; a first driver circuitry coupled to the first power supply rail and the second power supply rail; a second driver circuitry coupled to the third power supply rail, and coupled to the first driver circuitry; and a stack of transistors of N conductivity type coupled to the first power supply rail, and to the second driver circuitry.

Dynamic Reconfigurable Dual Power I/O Receiver

US Patent:
2020010, Apr 2, 2020
Filed:
Sep 29, 2018
Appl. No.:
16/147635
Inventors:
- Santa Clara CA, US
Roger K. Cheng - San Jose CA, US
Aaron Martin - El Dorado Hills CA, US
Christopher Mozak - Portland OR, US
Pavan Kumar Kappagantula - San Mateo CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G11C 7/10
G06F 13/16
G06F 1/32
Abstract:
An apparatus is provided which comprises: a first circuitry to sample a first input signal to generate a first sampled signal, and to sample a second input signal to generate a second sampled signal, wherein the first input signal comprises data; a second circuitry to receive the first sampled signal and the second sampled signal, and to generate a first pair of differential signals; an offset cancellation circuitry to cancel or reduce an offset in the first pair of differential signals; and a latch to receive the first pair of differential signals subsequent to the cancellation or reduction of the offset, and to output a second pair of differential signals, wherein the second pair of differential signals is indicative of the data.

Possible Relatives

Cynthia C Cheng  David Cheng  Dai P Cheng  Daisy Cheng  Deborah H Cheng  Debra L Cheng  Aaron Cheng  Roger L Johnson  Roger E Stancel  Roger A Standard 

NOTICE: You may not use BackgroundCheck or the information it provides to make decisions about employment, credit, housing or any other purpose that would require Fair Credit Reporting Act (FCRA) compliance. BackgroundCheck is not a Consumer Reporting Agency (CRA) as defined by the FCRA and does not provide consumer reports.