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Somnath Ghosh, 5432640 Nantasket Dr UNIT 5, Rancho Palos Verdes, CA 90275

Related to:
Sumona Samanta 57 Prasenjit Ghosh 57 Amitabh Ghosh 57 Mrinal K Ghosh 47 Indranath Ghosh 55 Parama G Ghosh 51 Sipra Ghosh Tirthankar Ghosh Kaushik Ghosh 50 Paul Tapasi 50

Somnath Ghosh Phones & Addresses

Rancho Palos Verdes, CA   

Torrance, CA   

5790 Dunster Ct, Alexandria, VA 22311   

Sunnyvale, CA   

Burbank, CA   

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Somnath Ghosh resumes & CV records

Resumes

Somnath Ghosh Photo 32

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Work:

Coordinator
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Somnath Ghosh

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Somnath Ghosh

Location:
United States
Somnath Ghosh Photo 35

Somnath Ghosh

Location:
United States

Publications & IP owners

Us Patents

Alias-Free Test For Dynamic Array Structures

US Patent:
6880154, Apr 12, 2005
Filed:
Jun 29, 2001
Appl. No.:
09/896936
Inventors:
Somnath Ghosh - San Jose CA, US
Rakesh Krishnaiyer - Santa Clara CA, US
Wei Li - Redwood Shores CA, US
Abhay Kanhere - Sunnyvale CA, US
Dattatraya Kulkarni - Santa Clara CA, US
John L. Ng - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F009/45
US Classification:
717151, 717145, 717154, 717155, 717140, 711105, 711169, 711170, 711173
Abstract:
An apparatus, method, and program product for optimizing code that contains dynamically-allocated memory. The aliasing behavior of internal pointers of dynamically-allocated memory is used to disambiguate memory accesses and to eliminate false data dependencies. It is determined whether a dynamically-allocated array will behave like a statically-allocated array throughout the entire program execution once it has been allocated. This determination is used to improve the instruction scheduling efficiency, which yields better performance.

Dynamic Prefetch Distance Calculation

US Patent:
7702856, Apr 20, 2010
Filed:
Nov 9, 2005
Appl. No.:
11/271415
Inventors:
Rakesh Krishnaiyer - Milpitas CA, US
Somnath Ghosh - Sunnyvale CA, US
Abhay Kanhere - Sunnyvale CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 13/00
G06F 13/28
US Classification:
711137, 712207, 717151, 717158, 717160, 717161
Abstract:
The prefetch distance to be used by a prefetch instruction may not always be correctly calculated using compile-time information. In one embodiment, the present invention generates prefetch distance calculation code to dynamically calculate a prefetch distance used by a prefetch instruction at run-time.

Compile-Time Memory Coalescing For Dynamic Arrays

US Patent:
2002014, Oct 3, 2002
Filed:
Mar 30, 2001
Appl. No.:
09/822736
Inventors:
Rakesh Krishnaiyer - Santa Clara CA, US
Somnath Ghosh - San Jose CA, US
Wei Li - Redwood City CA, US
International Classification:
G06F009/45
US Classification:
717/140000
Abstract:
In general, the malloc-combining transformation optimization during compile-time of a source program engaged in dynamically constructing multi-dimensional arrays provides an effective method of improving cache locality by combining qualified malloc and free/realloc calls found in counted loops into a single system call and hoisting out the single call and placing it immediately preceding the beginning of the counted loops. As a result of the application of the malloc-combining optimization results in improved cache locality allows for prefetching array pointers and data elements of the dynamic arrays as if the dynamic arrays were static.

Automatic Data Locality Optimization For Non-Type-Safe Languages

US Patent:
2004012, Jul 1, 2004
Filed:
Dec 31, 2002
Appl. No.:
10/331947
Inventors:
Somnath Ghosh - Sunnyvale CA, US
Rakesh Krishnaiyer - Santa Clara CA, US
Wei Li - Redwood City CA, US
David Sehr - Cupertino CA, US
International Classification:
G06F009/45
US Classification:
717/159000, 717/161000, 717/151000
Abstract:
An arrangement is provided for optimizing data locality for efficient memory access in code written in a non-type-safe programming language. Candidate structures in the code qualified to be optimized are first identified. Data locality optimization is then performed on such identified structures based on field re-ordering and structure splitting.

Isbn (Books And Publications)

1995 Asme International Mechanical Engineering Congress And Exposition, Volume 212-62: Computational Methods In Micromechanics

Author:
Somnath Ghosh
ISBN #:
0791817288

Possible Relatives

Debalina Ghosh  Debashis Ghosh  Debashish Ghosh  Debjani Ghosh  Debaprasad J Ghosh  Debraj Ghosh  Deepak Ghosh  Somnath Roy  Somnath Pal  Somnath Das 

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